Motorola MC9S12GC-Family - Manual (Page 79)

Device User Guide — 9S12C128DGV1/D V01.05
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Figure 8-6 Recommended PCB Layout for 80QFP Pierce Oscillator
Section 9 Clock Reset Generator (CRG) Block Description
Consult the CRG Block User Guide for information about the Clock and Reset Generator module.
9.1 Device-specific information
The CRG is part of the IPBus domain.
C5
C4
C3
C2
C10 C9
R1
C6
C1
VDD1
VSS1
VSS2
VDD2
VSSR
VDDR
VSSPLL
VDDPLL
VDDA
VSSA VSSX
VDDX
R2
C7
R3
C8
Q1
VSSPLL