M-Systems Flash Disk Pioneers Flash Memory - Manual (Page 5)

Implementing MLC NAND Flash for Cost-Effective, High-Capacity Memory
91-SR-014-02-8L 5
MLC Benefits and Limitations
MLC high-density design innovations reduce the silicon die size, which is the major element
contributing to overall device cost. For MLC NAND, this reduction in size and cost is greatest in
capacities of 256Mbit (32MByte) and higher, where the die can be as small as 50 percent of the size
required to provide the same capacity Binary flash device. The savings must be measured both in
dollars and space, particularly for the cell phone market where every millimeter of board real estate
can have an impact on the size of the end-user product and, ultimately, on market success.
But these very same high-density design innovations introduce three, major areas of design
limitations as compared with Binary flash:
• Data reliability
• Performance
• Flash management
This section discusses these areas in order to lay the groundwork for understanding how x2
technology overcomes the associated problems.
Data Reliability
As shown in Figure 2, a Binary flash cell must distinguish between 2 voltage states, whereas an MLC
flash cell must distinguish between 4. Since both Binary and MLC-based devices use a voltage
window with a similar size, the distance between adjacent voltage levels in MLC is much smaller
than in Binary flash. This reduced distance has an impact on data reliability. Detecting the voltage
levels in an MLC flash cell is a more precise and complex task than in a Binary flash cell, subject to
a higher probability of error that can affect data reliability in both the short and long term.
Assuming that the probability of all types of errors in Binary flash is on the order of 10
-10 , the overall
probability of MLC flash errors is two orders of magnitude worse.
Long-Term Data Errors
Flash memory cells must provide long-term data retention capabilities to function reliably as a non-
volatile memory device. In order to do this, the long-term stability of voltage levels is critical.
Leakage to/from the floating gate, which tends to slowly change the cell’s voltage level from its
initial level to a different level after cell programming or erasing, may change the voltage level. This
new level may incorrectly be interpreted as a different logical value. Due to the smaller distance
between MLC levels than Binary flash levels, MLC flash cells are more likely to be affected by
leakage effects and, consequently, more potentially prone to errors.
Program Disturb Errors
The program disturb effect, also called over program effect, causes a programming operation on one
page to induce a change in bit value on another, unrelated page. In Binary flash technology based on
a 0.16
µ manufacturing process, the typical program disturb error rate is on the order of 1 bit error per
10 10 bits programmed. This compares with an error rate on the order of 1 bit error per 10 8 bits
programmed with MLC flash technology.