Intel IQ80333 - Manual (Page 13)

Customer Reference Board Manual 13
Intel® IQ80333 I/O Processor
Introduction
Figure 1. Intel
®
80333 I/O Processor Block Diagram
B3613-02
PCIe x8
Intel XScale ®
Core Bus
Interface Unit
32-/64-bit DDR
Interface
Memory Controller
Interrupt/
GPIO
Unit
SMBus
Arbiter
B PCI-X Slot Bus (133 MHz)
A PCI-X IOP-Bus (133 MHz)
2.1 GB/s Internal Bus (333 MHz)
Arbiter/SHPC
2-channel
DMA
Controller
Timers
UART
Units
2 – I 2 C
Units
16-bit
PBI
Application
Accelerator Unit
PCIe to PCI-X*
Bridge
PCIe to PCI-X*
Bridge
Performance
Monitoring
Message
Unit
ATU
IOAPIC
IOAPIC