Silicon Laboratories C8051F347 - Manual (Page 273)

Rev. 1.3 273
C8051F340/1/2/3/4/5/6/7/8/9/A/B/C/D
23.2. C2 Pin Sharing
The C2 protocol allows the C2 pins to be shared with user functions so that in-system debugging and
Flash programming functions may be performed. This is possible because C2 communication is typically
performed when the device is in the halt state, where all on-chip peripherals and user software are stalled.
In this halted state, the C2 interface can safely ‘borrow’ the C2CK (RST) and C2D (P3.0) pins. Note that
the C2D pin is shared on the 32-pin packages only (C8051F342/3/6/7/9/A/B). In most applications, exter-
nal resistors are required to isolate C2 interface traffic from the user application. A typical isolation configu-
ration is shown in Figure 23.1.
Figure 23.1. Typical C2 Pin Sharing
The configuration in Figure 23.1 assumes the following:
1. The user input (b) cannot change state while the target device is halted.
2. The RST pin on the target device is used as an input only.
Additional resistors may be necessary depending on the specific application.
C2D
C2CK RST (a)
Input (b)
Output (c)
C2 Interface Master
C8051Fxxx