Symbol Technologies CMOS CXP854P60 - Manual (Page 15)

– 15 –
CXP854P60
Resolution
Linearity error
Zero transition
voltage
Full-scale transition
voltage
Conversion time
Sampling time
Analog input voltage
V ZT
∗
1
V FT
∗
2
t
CONV
t
SAMP
V
IAN
AN0 to AN3
Ta = 25°C
V
DD
= 5.0V
Vss = 0V
–10
4910
160/f
ADC
∗
3
12/f
ADC
∗
3
0
10
4970
8
±1
70
5030
V
DD
Bits
LSB
mV
mV
µs
µs
V
Item Symbol Pin Condition Min. Typ. Max. Unit
(5) A/D converter characteristics (Ta = –10 to +75°C, V DD = 4.5 to 5.5V, Vss = 0V)
Linearity error
V ZT V FT
Analog input
FF H
FE H
01 H
00 H
Digital conversion value
Fig. 8. Definitions for A/D converter terms
∗
1 V ZT : Digital conversion values change between 00 H
←→
01 H .
∗
2 V FT : Digital conversion values change between 0E H
←→
0F H .
∗
3 f ADC indicates the below values due to the bit6 (CKS) of A/D
control registor (address: 00F6 H ) and the Bit 7 (PCK1) and
Bit 6 (PCK0) of clock control registor (address: 00FE H )
00 (
φ
= f EX /2)
01 (
φ
= f EX /4)
11 (
φ
= f EX /16)
f
ADC
= f
C
/2
f ADC = f C /4
f ADC = f C /16
f
ADC
= f
C
CKS
PCK1, 0
0 (
φ
/2 selection) 1 (
φ
/2 selection)
f ADC = f C /2
f ADC = f C /8