Symbol Technologies CMOS CXP854P60 - Manual (Page 3)

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CXP854P60
HSYNC/PA7
VSYNC/PA6
PA5
PA4
PA3
PA2
PA1
PA0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
EC/PD7
RMC/PD6
HS1/PD5
HS0/PD4
SI/PD3
SO/PD2
SCK/PD1
V SS
V DD
Vpp
V SS
MP
PF0/PWM0
PF1/PWM1
PF2/PWM2
PF3/PWM3
PF4/PWM4/SCL0
PF5/PWM5/SCL1
PF6/PWM6/SDA0
PF7/PWM7/SDA1
YM
YS
I
B
G
R
EXLC
XLC
PE0/INT0
PE1/INT1
PE2/AN0
PE3/AN1
PE4/AN2
PE5/AN3
PE6/PWM
PE7/TO
RST
EXTAL
XTAL
PD0/INT2
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
40
39
38
37
36
35
34 31
32 33
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
63
64
61
62
1
Pin Assignment (Top View)
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20 21 22 23 24 25 26 27 28 30
40
39
38
37
36
35
34
31 32
33
41
42
43
44
45
46
47
48
49
50
51
52 53 54 55 56 57 58 59 60 63 64 61 62
1 PA1
PA0
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
EC/PD7
PF3/PWM3
PF4/PWM4/SCL0
PF5/PWM5/SCL1
PF6/PWM6/SDA0
PF7/PWM7/SDA1
YM
YS
I
B
G
R
EXLC
XLC
PE0/INT0
PE1/INT1
PE2/AN0
PE3/AN1
PE4/AN2
PE5/AN3
RMC/PD6 HS1/PD5 HS0/PD4
SI/PD3
SO/PD2
SCK/PD1
V SS
INT2/PD0
XTAL
EXTAL
RST
TO/PE7
PWM/PE6
PA2 PA3 PA4 PA5 PA6/VSYNC PA7/HSYNC V
SS
V
DD
Vpp MP PF0/PWM0 PF1/PWM1 PF2/PWM2
29
Note) 1. Vpp pin 63 must be connected to V DD .
2. Vss pins 32 and 62 must have a common GND.
3. MP pin 61 must be connected to GND.
Note) 1. Vpp pin 56 must be connected to V DD .
2. Vss pins 26 and 58 must have a common GND.
3. MP pin 55 must be connected to GND.