Si53xx-rm – Silicon Laboratories SI5375 User Manual
Page 5
Si53xx-RM
Rev. 1.2
5
6.4.3. Hitless Switching with Phase Build-Out (Si5324, Si5326, Si5327, Si5328,
6.5. Si5319, Si5324, Si5326, Si5327, Si5328, Si5368, Si5369, Si5374,
6.5.1. Free Run Mode Programming Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
6.5.2. Clock Control Logic in Free Run Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
6.5.3. Free Run Reference Frequency Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
6.5.4. Free Run Reference Frequency Constraints . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
6.6.1. Narrowband Digital Hold (Si5316, Si5324, Si5326, Si5328, Si5368,
6.6.2. History Settings for Low Bandwidth Devices (Si5324, Si5327, Si5328,
6.6.3. Recovery from Digital Hold (Si5319, Si5324, Si5326, Si5327, Si5328,
6.7.1. Coarse Skew Control (Si5326, Si5368) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
6.7.2. Fine Skew Control (Si5326, Si5368) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
6.7.3. Independent Skew (Si5324, Si5326, Si5328, Si5368, Si5369, Si5374, and Si5376) . . . . . . . . 79
6.7.4. Output-to-output Skew (Si5324, Si5326, Si5327, Si5328, Si5368,
6.8. Frame Synchronization Realignment (Si5368 and CK_CONFIG_REG = 1) . . . . . . . 79
6.8.1. FSYNC Realignment (Si5368) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
6.8.2. FSYNC Skew Control (Si5368) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
6.8.3. Including FSYNC Inputs in Clock Selection (Si5368) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
6.8.4. FS_OUT Polarity and Pulse Width Control (Si5368) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
6.8.5. Using FS_OUT as a Fifth Output Clock (Si5368) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
6.9. Output Clock Drivers (Si5319, Si5324, Si5325, Si5326, Si5327,
Si5328, Si5367, Si5368, Si5369, Si5374, Si5375, Si5376) . . . . . . . . . . . . . . . . . . . . 83
6.10. PLL Bypass Mode (Si5319, Si5324, Si5325, Si5326, Si5327, Si5328,
Si5367, Si5368, Si5369, Si5374, Si5375, and Si5376) . . . . . . . . . . . . . . . . . . . . . . 84
6.11. Alarms (Si5319, Si5324, Si5325, Si5326, Si5327, Si5328, Si5367,
6.11.1. Loss-of-Signal Alarms (Si5319, Si5324, Si5325, Si5326, Si5327, Si5328,
6.11.2. FOS Algorithm (Si5324, Si5325, Si5326, Si5328, Si5368, Si5369, Si5374, and Si5376) . . . . 85
6.11.3. C1B, C2B (Si5319, Si5324, Si5325, Si5326, Si5327, Si5328, Si5374,
6.11.4. LOS (Si5319, Si5375) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
6.11.5. C1B, C2B, C3B, ALRMOUT (Si5367, Si5368, Si5369 [CK_CONFIG_REG = 0]) . . . . . . . . . . 87
6.11.6. C1B, C2B, C3B, ALRMOUT (Si5368 [CK_CONFIG_REG = 1]) . . . . . . . . . . . . . . . . . . . . . . . 88
6.11.7. LOS Algorithm for Reference Clock Input (Si5319, Si5324, Si5326, Si5327,
6.11.8. LOL (Si5319, Si5324, Si5326, Si5327, Si5328, Si5368, Si5369, Si5374,