Silicon Laboratories SI5375 - Manual (Page 93)

Si53xx-RM
Rev. 1.2 93
Figure 36. SPI Timing Diagram
6.14.1. Default Device Configuration
For ease of manufacture and bench testing of the device, the default register settings have been chosen to place
the device in a fully-functional mode with an easily-observable output clock. Refer to the data sheet for your device.
6.15. Register Descriptions
See the device data sheet for a full description of the registers.
6.16. DSPLLsim Configuration Software
To simplify frequency planning, loop bandwidth selection, and general device configuration, of the Any-Frequency
Precision Clocks. Silicon Laboratories has a configuration utility - DSPLLsim for the Si5319, Si5325, Si5326,
Si5327, Si5328, Si5367, Si5368 and Si5369. For the Si5374, Si5375, and Si5376, there is a different configuration
utility - Si537xDSPLLsim. Both are available to download from
www.silabs.com/timing .
SCLK
SS
SDI
t
h1
t
d3
SDO
t
d1 t
d2
t
su1
t
r
t
f
t
c
t
su2
t
h2
t
cs
t
lsc
t
hsc