Oki MSM80C154S - Manual (Page 18)

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¡ Semiconductor MSM80C154S/83C154S
If CPU power down mode (PD, HPD) is activated with this bit set to "1", the
outputs from ports 0, 1, 2, and 3 are switched to floating status.
When this bit is "0", ports 0, 1, 2, and 3 are in output mode.
NAME ADDRESS
MSB LSB
7 6 5 4 3 2 1 0
BIT LOCATION FLAG FUNCTION
IOCON 0F8H — T32 SERR IZC P3HZ P2HZ P1HZ ALF
IOCON.0 ALF
IOCON.1 P1HZ
IOCON.2 P2HZ
IOCON.3 P3HZ
IOCON.4 IZC
IOCON.5 SERR
Timer/counters 0 and 1 are connected serially to from a 32-bit timer/counter
when this bit is set to "1".
TF1 of TCON is set if a carry is generated in the 32-bit timer/counter. IOCON.6 T32
Leave this bit at "0". IOCON.7 —
Port 1 becomes a high impedance input port when this bit is "1".
Port 2 becomes a high impedance input port when this bit is "1".
Port 3 becomes a high impedance input port when this bit is "1".
The 10 k W pull-up resistor for ports 1, 2, and 3 is switched off when this bit
is "1", leaving only the 100 k W pull-up resistor.
Serial port reception error flag.
This flag is set to "1" if an overrun or framing error is generated when data is
received at a serial port.
The flag is reset by software.
I/O control register (IOCON)