Texas Instruments SLOU121 - Manual (Page 41)

TPA6011A4 EVM Layers and Board Schematic
4-3 Reference
Figure 4–3. TPA06011A4 EVM Schematic Diagram
PGND
ROUT–
PVDD
RHPIN
RLINEIN
RIN
VDD
LIN
LLINEIN
LHPIN
PVDD
LOUT–
1
ROUT+
SE/BTL
HP/LINE
VOLUME
SEDIFF
SEMAX
AGND
BYPASS
FADE
SHUTDOWN
LOUT+
PGND
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
VDD
J1
R1
100 k
Ω
VDD
J2 R2
100 k
Ω
VDD
VDD
VDD
C8
0.47
µ
F
VDD
R3
100 k
Ω
J4
S1
VDD
C10
0.47
µ F
C11
10
µ F
C3
0.47
µ
F
C2
0.47
µ
F
C1
0.47
µ
F
VDD C7
0.47 µ F
C4
0.47
µ
F
C5
0.47
µ
F
C6
0.47 µ F
C9
0.47
µ F
ROUT+
SE/BTL
HP/LINE
ROUT–
VOLUME
GND
FADE
SDZ
LOUT+
GND
LOUT–
GND
R HP
R LINE–
R IN
L IN
L LINE–
L HP
VDD
R4
100 k
Ω
J3