Texas Instruments Digital Signal Processor SM320F2812-HT - Manual (Page 36)

SM320F2812-HT
SGUS062B – JUNE 2009 – REVISED JUNE 2011 www.ti.com
Table 3-6. Peripheral Frame 2 Registers (1)
NAME ADDRESS RANGE SIZE ( × 16) ACCESS TYPE
0x00 7000
reserved 16
0x00 700F
0x00 7010
System Control Registers 32 EALLOW Protected
0x00 702F
0x00 7030
reserved 16
0x00 703F
0x00 7040
SPI-A Registers 16 Not EALLOW Protected
0x00 704F
0x00 7050
SCI-A Registers 16 Not EALLOW Protected
0x00 705F
0x00 7060
reserved 16
0x00 706F
0x00 7070
External Interrupt Registers 16 Not EALLOW Protected
0x00 707F
0x00 7080
reserved 64
0x00 70BF
0x00 70C0
GPIO Mux Registers 32 EALLOW Protected
0x00 70DF
0x00 70E0
GPIO Data Registers 32 Not EALLOW Protected
0x00 70FF
0x00 7100
ADC Registers 32 Not EALLOW Protected
0x00 711F
0x00 7120
reserved 736
0x00 73FF
0x00 7400
EV-A Registers 64 Not EALLOW Protected
0x00 743F
0x00 7440
reserved 192
0x00 74FF
0x00 7500
EV-B Registers 64 Not EALLOW Protected
0x00 753F
0x00 7540
reserved 528
0x00 774F
0x00 7750
SCI-B Registers 16 Not EALLOW Protected
0x00 775F
0x00 7760
reserved 160
0x00 77FF
0x00 7800
McBSP Registers 64 Not EALLOW Protected
0x00 783F
0x00 7840
reserved 1984
0x00 7FFF
(1) Peripheral Frame 2 only allows 16-bit accesses. All 32-bit accesses are ignored (invalid data may be returned or written).
36 Functional Overview Copyright © 2009 – 2011, Texas Instruments Incorporated
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