Installation guide, E8950 – Veris Industries E8950 Install User Manual

Page 74

Advertising
background image

TM

E8950

INSTALLATION GUIDE

ZL0105-0B

PAGE 74

©2013 Veris Industries USA 800.354.8556 or +1.503.598.4564 / [email protected]

02131

Alta Labs, Enercept, Enspector, Hawkeye, Trustat, Aerospond, Veris, and the Veris ‘V’ logo are trademarks or registered trademarks of Veris Industries, L.L.C. in the USA and/or other countries.

Data Variable

Description

BACnet

Object

Units

COV_

Increment

Modbus

Address

Comments

AUX Channel (phase 1)

Breaker Size

AUX Channel (phase 1)

Breaker Size

AV92

Amps

5

161

AUX Channel (phase 2)

Breaker Size

AUX Channel (phase 2)

Breaker Size

AV93

Amps

5

162

AUX Channel (phase 3)

Breaker Size

AUX Channel (phase 3)

Breaker Size

AV94

Amps

5

163

AUX Channel (Neutral)

Breaker Size

AUX Channel (Neutral)

Breaker Size

AV95

Amps

5

164

High-High Latching

Alarm Time Delay

Alarm event duration

threshold

AV96

Seconds

1

165

These timers control entry into a latching alarm state. A return to a

non-alarm state is instantaneous. All channels use the same global

timers. Latching Alarm On Time applies to all Latching Alarms. The

parameter measurement rate is expected to be approximately 2.5

sec, which limits the effective resolution of these timers.

High Latching Alarm

Time Delay

Alarm event duration

threshold

AV97

Seconds

1

166

Low Latching Alarm

Time Delay

Alarm event duration

threshold

AV98

Seconds

1

167

Low-Low Latching Alarm

Time Delay

Alarm event duration

threshold

AV99

Seconds

1

168

Latching Alarm ON Time

From initial current to

alarms enabled

AV100

Seconds

1

169

Latching Alarm ON Time (when current is above Low-Low alarm and

ON Time elapses then ON state is declared for all latching alarms, ON

State enables Alarm Time Delays)

Latching Alarms time

until OFF state

time until OFF state

declared

AV101

Seconds

1

170

Latching Alarms time until OFF state is declared for all latching alarms

(when current is below Low-Low alarm and ON state was declared)

High-High Latching

Alarm Threshold

% of breaker size

AV102

Percent

1

171

High Alarm Latching

Alarm Threshold

% of breaker size

AV103

Percent

1

172

Low Alarm Latching

Alarm Threshold

% of breaker size

AV104

Percent

1

173

Low Low Latching Alarm

Threshold

% of breaker size

AV105

Percent

1

174

Non-Latching High

Threshold

% of breaker size

AV106

Percent

1

175

Non-Latching Low

Threshold

% of breaker size

AV107

Percent

1

176

Non-Latching Hysteresis

(0-100%)

Non-Latching Hysteresis

(% of setpoint)

AV108

Percent

1

177

Branch 1 Alarm Status

Write 0 to alarm bits to

clear alarms

AV109

n/a

1

178

Latching Alarms are cleared by writing a 0 to its alarm bit. Writing to a

Non-Latching alarm is ignored.

Bit 0: High High Latching Alarm
Bit 1: High Latching Alarm
Bit 2: Low Latching Alarm
Bit 3: Low Low Latching Alarm
Bit 4: Latching Alarm OFF state declared (1=OFF; ON state must have

been achieved prior)

Bit 5-7: Reserved for future use (reads 0)
Bit 8: High Non-Latching Alarm
Bit 9: Low Non-Latching Alarm
Bit 10-15: Reserved for future use (reads 0)

Branch 2 Alarm Status

Write 0 to alarm bits to

clear alarms

AV110

n/a

1

179

Branch 3 Alarm Status

Write 0 to alarm bits to

clear alarms

AV111

n/a

1

180

Branch 4 Alarm Status

Write 0 to alarm bits to

clear alarms

AV112

n/a

1

181

E30Bxxx/Cxxx and E31Bxxx/Cxxx Branch Circuit Meters cont.

Advertising