Rainbow Electronics MAX34440 - Manual (Page 40)

PMBus 6-Channel Power-Supply Manager
MAX34440
40
MFR_TIME_COUNT (DDh)
The MFR_TIME_COUNT command returns the number of seconds the device has been operating since the last time
power was applied to the device, RST was toggled, or a soft reset occurred. The counter is a 32-bit value and cannot
be reset by the user.
MFR_MARGIN_CONFIG (E0h)
The MFR_MARGIN_CONFIG command configures the digital PWM outputs to margin the power supplies. The
MFR_MARGIN_CONFIG command is described in Table 25.
Power-supply margining is implemented using the PWM outputs. The PWM frequency is 62.5kHz. The device close-loop
controls the duty cycle to margin the power supply. The device provides 6 bits of duty-cycle resolution.
The device margins the power supplies when OPERATION is set to one of the margin states. Margining of the sup-
plies does not begin until all enabled power supplies have exceeded their programmed POWER_GOOD_ON levels.
When this happens, the PWM output is enabled and the seed value from MFR_MARGIN_CONFIG is loaded as the
initial PWM duty cycle. The device then averages eight samples of VOUT for a total time of 40ms. If the measured
VOUT and the target (set by either VOUT_MARGIN_HIGH or VOUT_MARGIN_LOW) differ by more than 1%, the
PWM duty cycle is adjusted by one step. The direction of the duty cycle adjustment is determined by the SLOPE bit
in MFR_MARGIN_CONFIG. All changes to the PWM are made after averaging eight samples of VOUT over a 40ms
period.
The device is unable to successfully margin a power supply to the programmed target when the PWM duty cycle
reaches 0% or 100% and the target voltage has not been achieved. If this occurs, the device continues attempting to
margin the power supply and does the following:
1) Sets the NONE OF THE ABOVE bit in STATUS_BYTE.
2) Sets the NONE OF THE ABOVE and MFR bits in STATUS_WORD.
3) Sets the MARGIN_FAULT bit in STATUS_MFR_SPECIFIC.
4) Notifies the host through ALERT assertion (if enabled in MFR_MODE).
Also, the averaged VOUT after the PWM has initially been enabled with the seed value is compared to the target value.
If the programmed seed value causes VOUT to exceed the target, a MARGIN_FAULT is declared. For example, if the
target is VOUT_MARGIN_LOW and VOUT is less than VOUT_MARGIN_LOW after seeding, MARGIN_FAULT is set. In
response to this fault, the device continues margining the power supply and does the following:
1) Sets the NONE OF THE ABOVE bit in STATUS_BYTE.
2) Sets the NONE OF THE ABOVE and MFR bits in STATUS_WORD.
3) Sets the MARGIN_FAULT bit in STATUS_MFR_SPECIFIC.
4) Notifies the host through ALERT assertion (if enabled in MFR_MODE).
Table 25. MFR_MARGIN_CONFIG
BIT BIT NAME MEANING
15 SLOPE
PWM duty cycle to resulting voltage relationship.
0 = Negative slope (increasing duty cycle results in a lower voltage).
1 = Positive slope (increasing duty cycle results in a higher voltage).
14:6 0 These bits always return a 0.
5:0 SEED
This 6-bit value is used as the initial PWM duty cycle (i.e., seed value) when the device
begins to margin a power supply either up or down.