Rainbow Electronics AT45DB041D - Manual (Page 7)

7
3595R–DFLASH–11/2012
AT45DB041D
memory is reached, the device will continue reading back at the beginning of the same page. A
low-to-high transition on the CS pin will terminate the read operation and tri-state the output pin
(SO). The maximum SCK frequency allowable for the Main Memory Page Read is defined by the
f
SCK
specification. The Main Memory Page Read bypasses both data buffers and leaves the
contents of the buffers unchanged.
6.5 Buffer Read
The SRAM data buffers can be accessed independently from the main memory array, and utiliz-
ing the Buffer Read Command allows data to be sequentially read directly from the buffers. Four
opcodes, D4H or D1H for buffer 1 and D6H or D3H for buffer 2 can be used for the Buffer Read
Command. The use of each opcode depends on the maximum SCK frequency that will be used
to read data from the buffer. The D4H and D6H opcode can be used at any SCK frequency up to
the maximum specified by f
CAR1
. The D1H and D3H opcode can be used for lower frequency
read operations up to the maximum specified by f
CAR2
.
To perform a buffer read from the DataFlash standard buffer (264-bytes), the opcode must be
clocked into the device followed by three address bytes comprised of 15 don’t care bits and
nine buffer address bits (BFA8 - BFA0). To perform a buffer read from the binary buffer (256-
bytes), the opcode must be clocked into the device followed by three address bytes comprised
of 16 don’t care bits and 8 buffer address bits (BFA7 - BFA0). Following the address bytes, one
don’t care byte must be clocked in to initialize the read operation. The CS pin must remain low
during the loading of the opcode, the address bytes, the don’t care bytes, and the reading of
data. When the end of a buffer is reached, the device will continue reading back at the beginning
of the buffer. A low-to-high transition on the CS pin will terminate the read operation and tri-state
the output pin (SO).
7. Program and Erase Commands
7.1 Buffer Write
Data can be clocked in from the input pin (SI) into either buffer 1 or buffer 2. To load data into the
DataFlash standard buffer (264-bytes), a 1-byte opcode, 84H for buffer 1 or 87H for buffer 2,
must be clocked into the device, followed by three address bytes comprised of 15 don’t care bits
and nine buffer address bits (BFA8 - BFA0). The nine buffer address bits specify the first byte in
the buffer to be written. To load data into the binary buffers (256-bytes each), a 1-byte opcode
84H for buffer 1 or 87H for buffer 2, must be clocked into the device, followed by three address
bytes comprised of 16 don’t care bits and 8 buffer address bits (BFA7 - BFA0). The eight buffer
address bits specify the first byte in the buffer to be written. After the last address byte has been
clocked into the device, data can then be clocked in on subsequent clock cycles. If the end of the
data buffer is reached, the device will wrap around back to the beginning of the buffer. Data will
continue to be loaded into the buffer until a low-to-high transition is detected on the CS pin.