Ds1870 ldmos rf power-amplifier bias controller, Functional diagram – Rainbow Electronics DS1870 User Manual
Page 9
Advertising
DS1870
LDMOS RF Power-Amplifier Bias
Controller
_____________________________________________________________________
9
Functional Diagram
∑
∑
+
+
+
+
∑
+
+
M
U
X
13-BIT
ADC
ON-CHIP
TEMP SENSOR
V
CC
V
D
I
D1
I
D2
ADDRESS
GENERATION
SDA
SCL
A
0
A
1
A
2
I
2
C DATA BUS
32 BYTES
USER
MEMORY
OFFSET
CALIBRATION
REGISTERS
FAULT
LOAD
INDEX
INDEX
INDEX
INDEX
LOAD
TEMP
POT1
R
POT
POT2
R
POT
H
COM
L
2
W
2
W
1
L
1
POT1
DRAIN
LUT
TABLE 4
(64 BYTES)
POT2
DRAIN
LUT
TABLE 5
(64 BYTES)
LIMIT
COMPARATOR
LIMIT FLAG
REGISTERS
FAULT
MASK
V
CC
V
CC
GND
GAIN
CALIBRATION
REGISTERS
V
D
VD1
VD2
V
D
I
D2
I
D1
POT1
TEMP
LUT
TABLE 2
(72 BYTES)
POT2
TEMP
LUT
TABLE 3
(72 BYTES)
R
S
R
S
I
2
C INTERFACE
CONTROL
HI AND LO
LIMITS FOR
TEMP, V
CC
,
V
D
, I
D1
, I
D2
MEASURED
VALUES FOR
TEMP, V
CC
,
V
D
, I
D0
, I
D1
DS1870
Advertising