Serial interface, Serial protocol, Atar862-3 – Rainbow Electronics ATAR862-3 User Manual
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89
ATAR862-3
4556B–4BMCU–02/03
Figure 94.
Block Diagram EEPROM
Serial Interface
The U505M has a two-wire serial interface (TWI) to the microcontroller for read and
write accesses to the EEPROM. The U505M is considered to be a slave in all these
applications. That means, the controller has to be the master that initiates the data
transfer and provides the clock for transmit and receive operations.
The serial interface is controlled by the microcontroller block which generates the serial
clock and controls the access via the SCL-line and SDA-line. SCL is used to clock the
data into and out of the device. SDA is a bi-directional line that is used to transfer data
into and out of the device. The following protocol is used for the data transfers.
Serial Protocol
•
Data states on the SDA-line changing only while SCL is low.
•
Changes on the SDA-line while SCL is high are interpreted as START or STOP
condition.
•
A START condition is defined as high to low transition on the SDA-line while the
SCL-line is high.
•
A STOP condition is defined as low to high transition on the SDA-line while the SCL-
line is high.
•
Each data transfer must be initialized with a START condition and terminated with a
STOP condition. The START condition wakes the device from standby mode and the
STOP condition returns the device to standby mode.
•
A receiving device generates an acknowledge (A) after the reception of each byte.
This requires an additional clock pulse, generated by the master. If the reception
was successful the receiving master or slave device pulls down the SDA-line during
that clock cycle. If an acknowledge is not detected (N) by the interface in transmit
mode, it will terminate further data transmissions and go into receive mode. A
master device must finish its read operation by a non-acknowledge and then send a
stop condition to bring the device into a known state.
16-bit read/write buffer
Address
control
8-bit data register
EEPROM
32 x 16
HV-generator
Timing control
Mode
control
I/O
control
SCL
V
DD
V
SS
SDA