Rainbow Electronics MAX2769B - Manual (Page 13)

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MAX2769B
Universal GPS Receiver
Figure 1. Schematic of the Crystal Oscillator in the MAX2679B
EV Kit
Detailed Description
Integrated Active Antenna Sensor
The MAX2769B includes a low-dropout switch to bias an
external active antenna. To activate the antenna switch
output, set ANTEN in the Configuration 1 register to logic
1. This closes the switch that connects the antenna bias
pin to V
CC_RF
to achieve a low 200mV dropout for a
20mA load current. A logic-low in ANTEN disables the
antenna bias. The active antenna circuit also features
short-circuit protection to prevent the output from being
shorted to ground.
Low-Noise Amplifier (LNA)
The MAX2769B integrates two low-noise amplifiers.
LNA1 is typically used with a passive antenna. This LNA
requires an AC-coupling capacitor. In the default mode,
the bias current is set to 4mA, the typical noise figure and
IIP3 are approximately 0.8dB and -1.1dBm, respectively.
LNA2 is typically used with an active antenna. The LNA2
is internally matched to 50. and requires a DC-blocking
capacitor. Bits LNAMODE in the Configuration 1 register
control the modes of the two LNAs. See
Table 6 and
Table 7 for the LNA mode settings.
Mixer
The MAX2769B includes a quadrature mixer to output
low-IF or zero IF I and Q signals. The quadrature mixer
is internally matched to 50I and requires a low-side LO
injection. The output of the LNA and the input of the mixer
are brought off-chip to facilitate the use of a SAW filter.
Programmable Gain Amplifier (PGA)
The MAX2769B integrates a baseband programmable
gain amplifier that provides 59dB of gain control range.
The PGA gain can be programmed through the serial
interface by setting bits GAININ in the Configuration
3 register. Set bits 12 and 11 (AGCMODE) in the
Configuration 2 register to 10 to control the gain of the
PGA directly from the 3-wire interface.
Automatic Gain Control (AGC)
The MAX2769B provides a control loop that automatically
programs PGA gain to provide the ADC with an input
power that optimally fills the converter and establishes a
desired magnitude bit density at its output. An algorithm
operates by counting the number of magnitude bits over
512 ADC clock cycles and comparing the magnitude bit
count to the reference value provided through a control
word (GAINREF). The desired magnitude bit density is
expressed as a value of GAINREF in a decimal format
divided by the counter length of 512. For example, to
achieve the magnitude bit density of 33%, which is opti-
mal for a 2-bit converter, program the GAINREF to 170,
so that 170/512 = 33%.
Baseband Filter
The baseband filter of the receiver can be programmed
to be a lowpass filter or a complex bandpass filter.
The lowpass filter can be configured as a 3rd-order
Butterworth filter for a reduced group delay by setting
bit F3OR5 in the Configuration 1 register to be 1 or a
5th-order Butterworth filter for a steeper out-of-band
rejection by setting the same bit to be 0. The two-sided
3dB corner bandwidth can be selected to be 2.5MHz,
4.2MHz, 9.66MHz, or by programming bits FBW in the
Configuration 1 register. When the complex filter is
enabled by changing bit FCENX in the Configuration 1
register to 1, the lowpass filter becomes a bandpass
filter and the center frequency can be programmed by
bits FCEN and FCENMSB in the Configuration 1 register.
CLKOUT
10nF
16
15
XTAL
23pF
BASEBAND
CLOCK
MAX2769B