Table 8. configuration 2 (address: 0001), Table 9. configuration 3 (address: 0010), Max2769b universal gps receiver – Rainbow Electronics MAX2769B User Manual

Page 20

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MAX2769B

Universal GPS Receiver

Table 8. Configuration 2 (Address: 0001)

Table 9. Configuration 3 (Address: 0010)

DATA BIT

LOCATION

DEFAULT

VALUE

(PGM = 0)

DESCRIPTION

IQEN

27

0

I and Q channels enable. Set 1 to enable both I and Q channels and 0 to enable I
channel only.

GAINREF

26:15

170d

AGC gain reference value expressed by the number of MSB counts (magnitude bit
density). 10101010 = 234 magnitude bit density reference, 1010100 = 84 magnitude bit
density reference, 100111010 = 314 magnitude bit density reference.

RESERVED

14:13

00

Reserved.

AGCMODE

12:11

00

AGC mode control. Set D12:D11 = 00: independent I and Q; 01: reserved; 10: gain is set
directly from the serial interface by GAININ; 11: reserved.

FORMAT

10:9

01

Output data format. Set D10:D9 = 00: unsigned binary; 01: sign and magnitude; 1X:
two’s complement binary.

BITS

8:6

010

Number of bits in the ADC. Set D8:D6 = 000: 1 bit, 001: reserved; 010: 2 bits;
011: reserved, 100: 3 bits.

DRVCFG

5:4

00

Output driver configuration. Set D5:D4 = 00: CMOS logic, 01: reserved; 1X: analog
outputs.

RESERVED

3

1

RESERVED

2

0

DIEID

1:0

00

Identifies a version of the IC.

DATA BIT

LOCATION

DEFAULT

VALUE

(PGM = 0)

DESCRIPTION

GAININ

27:22

111010

PGA gain value programming from the serial interface in steps of dB per LSB. 000000 =
PGA gain set to 0dB, 101011 = 42dB, 101100 = 43dB, 101110 = 45dB, 111010 = 57dB,
111111 = 62dB.

RESERVED

21

1

HILOADEN

20

0

Set 1 to enable the output driver to drive high loads.

RESERVED

19

1

RESERVED

18

1

RESERVED

17

1

RESERVED

16

1

FHIPEN

15

1

Highpass coupling enable. Set 1 to enable the highpass coupling between the filter
and PGA, or 0 to disable the coupling.

RESERVED

14

1

RESERVED

13

1

RESERVED

12

0

STRMEN

11

0

DSP interface for serial streaming of data enable. This bit configures the IC such that the
DSP interface is inserted in the signal path. Set 1 to enable the interface or 0 to disable
the interface.

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