Vil(ac), maximum ac input logic low, Vil(dc), minimum dc input logic low, Read bursts (outputs) – Teledyne LeCroy QPHY-DDR3 User Manual

Page 38: Srq (output slew rate), Srqr and srqf, Timing tests, Read bursts

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38

917717 Rev C

The local minimum must be greater than or equal to the minimum limit. The local maximum must be less
than or equal to the maximum limit.

VIL(ac), maximum AC input logic low

Measure the local minimum value from VREF to VREF of the low pulse histogram. If multiple pulses are
measured, take the lowest number and the highest number as the worst cases.

The lowest number must be greater than or equal to the minimum limit and the highest number must be
less than or equal to the maximum limit.

VIL(dc), minimum DC input logic low

Measure the local minimum and maximum values from the first VIL(ac)max crossing point to the time
corresponding to VIL(dc)max crossing a 1V/ns slewrate slope to VREF. If multiple pulses are measured,
take the lowest, respectively the highest, number as the worst case.

The local minimum must be greater than or equal to the minimum limit. The local maximum must be less
than or equal to the maximum limit.

Read B

ursts

(Outputs)

SRQ (Output Slew Rate)

SRQr and SRQf

Apply to all output signals.

The output slew rate is measured from VOL(ac) to VOH(ac) for the rising edge and from VOH(ac) to
VOL(ac) for the falling edge

Timing Tests

Read Bursts

tDQSQ, DQS-DQ Skew for DQS and Associated DQ Signals

Maximum skew between the DQS line and the associated DQ line within a read burst

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