HP XP Array Manager Software - Manual (Page 15)

Setting value of ending address (CC) and Setting value of ending address (HH) is the
value which is input in the Cache Residency window.
•
Converted value of ending address
= Setting value of ending address (CC) x 15 + Setting value of ending address (HH)
Setting value of ending address (CC) and Setting value of ending address (HH) is the
value which is input in the Cache Residency window.
2. Calculate the number of addresses between the starting address and the ending address
calculated in procedure 1:
•
Number of addresses
= Converted value of ending address - Converted value of starting address + 1
Calculate the number of addresses of cache that are used by the user data.
3. Calculate the required cache size according to the operation modes, or the RAID levels to use
Cache Residency.
a.
Where the bind mode is set:
For RAID-1:
•
Required cache size = (Number of addresses x ((128 x (512 + 16)) x 2) ÷ 1,024
The unit is KB.
For RAID type other than RAID-1:
•
Required cache size = (Number of addresses x (128 x (512 + 16)) x 3) ÷ 1,024
The unit is KB.
b. Where the priority mode is set:
•
Required cache size = (Number of addresses x (128 x (512 + 16))) ÷ 1,024
The unit is KB.
Note: If a RAID-5 or RAID-6 volume area is changed from priority mode to bind mode and no
cache is added, then only 33 percent of the user data will fit in the area previously assigned for
priority mode, and the remaining 67 percent is used to save read/write data. If a RAID-1 volume
area is changed from priority mode to bind mode and no cache is added, then only 50 percent
of the user data will fit in the area previously assigned for priority mode, and the remaining 50
percent is used to save read/write data. Changing the mode without cache extension requires a
Cache Residency reconfiguration.
Cache Residency Cache Extents
The Cache Residency cache areas (called cache extents) have the following parameters:
•
The cache extents are dynamic and can be added or deleted at any time.
•
The storage system supports a maximum of 1,024 addressable cache extents per LDEV and
per subsystem.
•
For mainframe volumes, each Cache Residency cache area must be defined on contiguous
tracks, with a minimum size of one cache slot (or track) and a maximum size of one LVI. This
is equivalent to 66 KB.
•
For OPEN-V volumes, Cache Residency cache extents must be defined in logical blocks using
logical block addresses (LBAs), with a minimum size of 512 LBAs (equivalent to 264 KB). (For
other than OPEN-V, see Appendix A.) However, in most cases users will assign an entire
open-system volume for Cache Residency. If the remaining cache memory is less than 256
MB, Cache Residency is not available.
Cache Residency Cache Extents 15