Cirrus Logic CS42L52 - Manual (Page 22)

22 DS680F2
CS42L52
3/1/13
DC ELECTRICAL CHARACTERISTICS
AGND = 0 V; All voltages with respect to ground.
17. Valid with the recommended capacitor values on FILT+ and VQ. Increasing the capacitance will also
increase the PSRR.
18. The PGA is biased with VQ, created from a resistor divider from the VA supply. Increasing the capaci-
tance on VQ will also increase the PSRR at low frequencies. A 10 µF capacitor on VQ improves the
PSRR to 42 dB.
DIGITAL INTERFACE SPECIFICATIONS AND CHARACTERISTICS
19. See “I/O Pin Characteristics” on page 10 for serial and control port power rails.
Parameters Min Typ Max Units
VQ Characteristics
Nominal Voltage
Output Impedance
DC Current Source/Sink -
-
- 0.5•VA
23
-
-
-
1
V
k

A
MIC BIAS Characteristics
Nominal Voltage BIASLVL[2:0] = 000
BIASLVL[2:0] = 001
BIASLVL[2:0] = 010
BIASLVL[2:0] = 011
BIASLVL[2:0] = 100
BIASLVL[2:0] = 101
DC Output Current
Power Supply Rejection Ratio (PSRR)
1 kHz
-
-
-
-
-
-
-
- 0.5•VA
0.6•VA
0.7•VA
0.8•VA
0.83•VA
0.91•VA
-
50
-
-
-
-
-
-
1
-
V
V
V
V
V
V
mA
dB
Power Supply Rejection Ratio Characteristics
PSRR @1 kHz (Note 17) PGA to ADC
ADC
DAC (HP and Line Amps)
-
-
- 44
60
60 -
-
- dB
dB
dB
PSRR @60 Hz (Note 17) PGA to ADC (Note 18)
ADC
DAC (HP and Line Amps)
-
-
- 22
42
60 -
-
- dB
dB
dB
PSRR @217 Hz Full-Bridge PWM Outputs - 56 - dB
Parameters (Note 19) Symbol Min Max Units
Input Leakage Current I
in
- ±10
A
Input Capacitance - 10 pF
1.8 V - 3.3 V Logic
High-Level Output Voltage (I
OH
= -100
A)
V
OH
VL - 0.2 - V
Low-Level Output Voltage (I
OL
= 100
A)
V
OL
- 0.2 V
High-Level Input Voltage VL = 1.65 V
VL = 1.8 V
VL = 2.0 V
VL > 2.0 V
V
IH
0.85•VL
0.77•VL
0.68•VL
0.65•VL -
-
-
- V
V
V
V
Low-Level Input Voltage V
IL
- 0.30•VL V