13 tt cycle count register (addresses 0x3d & 0x3c), 14 tt error level register (addresses 0x3f & 0x3e) – Bosch TTCAN User Manual
Page 35
User’s Manual
BOSCH
- 35/77 -
Revision 1.6
TTCAN
11.11.02
manual_about.fm
3.5.13 TT Cycle Count Register (addresses 0x3D & 0x3C)
C_Cnt5-0
Cycle_Count
0x00-0x3F The number of the actual Basic Cycle in the System Matrix.
3.5.14 TT Error Level Register (addresses 0x3F & 0x3E)
MSCmax
Maximum Message Status Count
0x0-0x7 The highest Message Status Count of all periodic Message Objects.
MSCmin
Minimum Message Status Count
0x0-0x7 The lowest Message Status Count of all periodic Message Objects.
TTEL
TT Error Level
0x0
severity 0 : No Error
0x1
severity 1 : Warning
0x2
severity 2 : Error
0x3
severity 3 : Fatal Error
3.5.15 TUR Numerator Configuration Low Register (addresses 0x57 & 0x56)
NumCfgL TUR Numerator Configuration (low part)
0x0000-0xFFFF NumCfg[15
…
0]
NumCfg is an 18-bit value. Its high part, NumCfg[17
…
16] is hard wired to 0b01. The range of
NumCfg is [0x10000
…
0x1FFFF]. The value configured in NumCfg is the initial value for
NumAct, so when the number 0xnnnn is written to NumCfg[15
…
0], NumAct starts with the
value 0x1nnnn. NumCfgL may be written during Configuration Mode or if EESC (Enable
External Clock Synchronisation) is set. When a new value for NumCfgL is written after
Configuration Mode, the new value takes effect when the ECS bit of the TT Clock Control
register is written to ‘1’.
Note :
The actual value of TUR may be changed by the clock drift compensation function of TTCAN
Level 2 in order to adjust the node’s local view of the NTU to the time master view of the NTU.
DenomCfg will not be changed by the automatic drift compensation, NumAct may be adjusted
in the range of the Synchronisation Deviation Limit around NumCfg. NumCfg and DenomCfg
should be programmed to the largest suitable values in order to allow the best computational
accuracy for the drift compensation process.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
res
C_Cnt5-0
r
r
r
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
reserved
MSCmax
MSCmin
TTEL
r
r
r
r
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
NumCfgL
rw
rw