4 message handler registers, 1 interrupt register (addresses 0x09 & 0x08), Message handler registers – Bosch TTCAN User Manual
Page 27: Interrupt register (addresses 0x09 & 0x08)
User’s Manual
BOSCH
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Revision 1.6
TTCAN
11.11.02
manual_about.fm
Data 0
1st data byte of a CAN Data Frame
Data 1
2nd data byte of a CAN Data Frame
Data 2
3rd data byte of a CAN Data Frame
Data 3
4th data byte of a CAN Data Frame
Data 4
5th data byte of a CAN Data Frame
Data 5
6th data byte of a CAN Data Frame
Data 6
7th data byte of a CAN Data Frame
Data 7
8th data byte of a CAN Data Frame
Note :
Byte Data 0 is the first data byte shifted into the shift register of the CAN Core during a recep-
tion, byte Data 7 is the last. When the Message Handler stores a Data Frame, it will write all the
eight data bytes into a Message Object. If the Data Length Code is less than 8, the remaining
bytes of the Message Object will be overwritten by non specified values.
3.4 Message Handler Registers
All Message Handler registers are read-only. Their contents (TxRqst, NewDat, IntPnd, and
MsgVal bits of each Message Object and the Interrupt Identifier) is status information provided
by the Message Handler FSM.
3.4.1 Interrupt Register (addresses 0x09 & 0x08)
IntId15-0
Interrupt Identifier (the number here indicates the source of the interrupt)
0x0000
No interrupt is pending.
0x0001-0x0020 Number of Message Object which caused the interrupt.
0x0021-0x3FFF unused.
0x4000
TTCAN Interrupt.
0x4001-0x7FFF unused.
0x8000
Status Interrupt.
0x8001-0xBFFF unused.
0xC000
TTCAN Interrupt and Status Interrupt.
0xC001-0xFFFF unused.
If several interrupts are pending, the CAN Interrupt Register will point to the pending interrupt
with the highest priority, disregarding their chronological order. An interrupt remains pending
until the CPU has cleared it. If IntId is different from 0x0000 and IE is set, the interrupt line to
the CPU, IRQ_B, is active. The interrupt line remains active until IntId is back to value 0x0000
(the cause of the interrupt is reset) or until IE is reset.
The Status Interrupt has the highest priority. Among the message interrupts, the Message
Object’s interrupt priority decreases with increasing message number.
A message interrupt is cleared by clearing the Message Object’s IntPnd bit. The Status
Interrupt is cleared by reading the Status Register. The TTCAN Interrupt is cleared by reading
the TTCAN Interrupt Vector Register.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
IntId15-8
IntId7-0
r
r