BNC 130 - Manual (Page 18)

18
THEORY OF OPERATION
The two current sources are used for different Modes. The current source on the left is used during Pulse
and Impulse Modes (to supply the Peak level), and during the External Modulation Mode. This current
source can be modulated from a wideband preamp which is driven by the front panel SMA connector
EXT MOD. The current is switched to the laser by SI, as determined by the DIGITAL DRIVE SELECT
and the drive signals. The current source on the right is used during PULSE MODE when a nonzero
Baseline level is selected and in the CW Mode.
The Laser Protection circuitry monitors the laser output and circuit conditions. If the laser output exceeds
a preset level, S2 will be closed and all laser drive current will be shunted to ground. The current is then
monitored until it is reduced below another preset value before S2 is allowed to reopen. This block drives
the front panel LEDs, LASER ACTIVE and LASER GUARD, which allow the user to monitor the state of
these circuits. The DAC EN signal is used to notify the Module Interface board of a potential problem and
disable its DACs, thus setting all level control voltages to zero. The MOD DIS signal is used to disable
the module's output.
The Laser Module is a single package that contains the laser diode, a PIN monitor diode, a
thermoelectric cooler (TEC), and a temperature sensing device. An 8/123 Um single-mode fiber is
connected to the front panel (LIGHT OUT). The TEC and thermistor are used in conjunction with an op
amp and transistor to regulate the temperature of the laser diode, thus improving power and wavelength
stability.
CIRCUIT DESCRIPTION
Module Interface Board (Schematic 6040-35)
The Module Interface board contains all the necessary circuits to allow the 6040 mainframe to control the
module. Interfacing between the module and the mainframe is realized via the 40-pin edge connector,
PS, This delivers eight data bits (QADO-QAD7) and 13 address bits (QADO-QAD7, multiplexed, and
QA8-QA12, nonmultiplexed). P8 also delivers power to the Interface board and the Output board.
Z2 is an eight bit latch that demultiplexes QADO-QAD7 to produce the lower eight address bits QAO-
QA7. This allows up to 8K bytes to be addressed within the Interface board, though not all of this is
utilized at the present time. Table 3-1 gives the memory map for the module.
Z1 is a dual quad selector. Z1 A is used to select between one of four 2K byte segments. These four
segments are used for: 1) Z3, the I.D. ROM; 2) Z4, the nonvolatile RAM; 3) reserved for expansion; 4)
Z5, Z6 and Z7, the digital and analog control of the output board. Z1B selects which IC in the fourth
segment is accessed.
Z3 is the I.D. ROM. It is an 8K byte ROM (only the lower 2K is used) that contains the module dependent
information necessary for the 60-40 to operate correctly.