Crown Audio IQ-USM 810 - Manual (Page 18)

©2000 Crown International, Inc.
IQ-USM 810 Service Manual
3-8 Circuit Theory
130447-1 Rev. A
bus and accesses SDRAM when it is available. The
SHARC blocks access to the bus through the use of
the \SDLOCK pin during SDRAM transfers. SDRAM is
utilized only for audio delay processing and has no firm-
ware. If audio is available at the input SHARC's, but is
not being seen by the output SHARC's, a good place to
begin troubleshooting would be with SDRAM.
The System Controller periodically accesses the
SHARC's to query about meter data. As discussed, the
System Controller utilizes the Interface to ask and re-
ceive this data.
3.5.9 Audio Routing
Serial audio from the Input PWA is sent to the SHARC
PWA for processing. ADC1-4 is fed to PLD U9 for rout-
ing to the input SHARC's, U25 & U27. Serial digital au-
dio from the optional CobraNet PWA is also available
as CNET_TX1-4. The Input Router sends the appropri-
ate serial audio data to the input SHARC's as directed
by the System Controller via SHARC 1. A serial control
link (IN_MOSI, IN_SPICK) tells the Input Router which
of the serial digital inputs are to be sent to each SHARC's
serial ports.
The Input Router is also responsible for buffering the
audio clocks. By sensing the CNET input from the CNET
PWA, the Input Router can tell if the CNET PWA is con-
nected. If CNET is available, the CNET PWA is respon-
sible to provide the Serial and Frame Clocks. The PLD
accepts the CNET audio clocks and routes them to the
SHARC's and Input PWA. If the CNET PWA is not con-
nected, the audio clocks from the Input PWA are ac-
cepted and routed to the SHARC's.
The Output Router, U11, is responsible for sending the
serial audio outputs of the output SHARC's to the ap-
propriate place. Five output lines, DAC1-5, allow 10
audio channels to be sent to the Output PWA for DAC
conversion. In addition, four output lines, CNET_RX1-4,
allow 8 audio channels to be directed to the optional
CNET PWA for inclusion onto the CNET system. The
Output Router is programmed by SHARC 2 via
OUT_MOSI & OUT_SPICK.
3.6 System Controller
The System Controller PWA sits on the one side of the
chassis and is supported over the power supply. It is
responsible for the coordination and communication with
the outside world, non-volatile memory storage of all
code, and various other functions. The System
Controller's tasks includes Control Processing, RS232,
Crown Bus loop, Real-Time Clock, Front Panel, and
Control Port. Figure 3.10 shows a block diagram for the
System Controller PWA.
Figure 3.10 System Controller Block Diagram