Crown Audio IQ-USM 810 - Manual (Page 20)

©2000 Crown International, Inc.
IQ-USM 810 Service Manual
3-10 Circuit Theory
130447-1 Rev. A
The HC12 firmware uses a real time operating system
(RTOS) to make efficient use of the HC12's processing
capability. Various tasks are given priorities, and the
RTOS supervises what task has control of the proces-
sor at any particular time.
3.6.2 RS232
As mentioned, the RS232 port is used to load firmware
into flash memory. UART U2 provides the serial port
interface to the HC12. The baud rate is programmed
by the HC12 as directed by the front panel (19.2 k to
115 kbps) and the clock is generated from the 14-MHz
clock. The 8-bit parallel interface to the UART is con-
trolled by the U_RD (read), U_CS (chip select), and
FLSH_WE (write) lines. Internal registers control vari-
ous functions such as baud rate, fifo usage, etc. The
serial I/O of the UART is buffered by RS232 Tx/Rx driver
U1. This buffer takes the +5V and creates the +/–12V
needed for RS232 levels. These signals are available
on the DB9F connector, J1, which is available on the
back panel of the chassis.
The other half of dual UART U2 is used as a serial inter-
face to the optional CNET PWA. It connects to the CNET
PWA via SHARC connector P1.
3.6.3 Crown Bus Loop
The HC12 has two serial ports and one of them is used
for the interface to the Crown Bus loop hardware. This
is a fixed 38.4-kbps baud rate and uses a dual RJ45
connector J2 to the back panel. In normal operation,
data detected at the input of the Crown Bus loop hard-
ware is sent back out via U19A & B, U20B, and U21A.
When the HC12 wants to communicate, MSTR0 is pulled
high and the TX0 goes out to the Crown Bus loop. R142
provides 20 mA of current to the OUT+ line during nor-
mal operation. Communication occurs by interrupting
the OUT– path via D4 and U21A.
The input of the Crown Bus loop is buffered by
optoisolator U17 which senses the 20-mA current and
sends the signals to the HC12 (RX0) and directs it back
out the Crown Bus loop via U19A.
Relay K1 provides paths to the I/O circuitry while the
IQ-USM 810 is powered. When the unit is turned off, the
relay allows the Crown Bus loop to pass through the
unit to prevent Crown Bus loop communication from
being interrupted.
3.6.4 Real Time Clock
U11 is a Real Time Clock (RTC) IC that provides timing
to the HC12 for scheduling of real time events. U11 has
an internal oscillator provided by 32-kHz crystal Y1. The
HC12 communicates with the RTC via a serial interface
composed of RTCLK (serial clk), RTC (data), and
RTC_CS (chip select) and periodically queries the RTC
to get or set the time.
Capacitor C25 is a 1F supercap that allows the RTC to
continue to keep time after the unit is powered down.
The RTC senses the loss of power and automatically
switches to the capacitor to provide power. The capaci-
tor can keep the RTC running for up to 45 days without
external power. While the unit is powered, the RTC trickle
charges the capacitor.
3.6.5 Front Panel
The HC12 interfaces the Front Display PWA via P6. The
three front panel switches are sensed by the HC12 and
display of the front panel LED's are controlled via a se-
rial interface; SCK, MOSI, MISO, and LED_CS. Two dis-
play IC's on the Front Display PWA interface both the
discrete LED's and the triple 7-segment display.
3.6.6 Control Port
The control port interface allows external signals or
events to control objects within the box. Additionally,
outputs allow signaling of object status to the outside.
The DB37M connector P7 provides back panel access.
+5V, +10V, and GND is also provided via the connec-
tor. Regulator U18 takes the +15V and provides +10V
out. The external power is protected by resettable fuses
limited to 1 A.
The HC12 interfaces the output buffers through latches
U6 and U7. These 16 outputs drive NPN transistors that
provide 10V @ 10 mA to the outside. Ferrite beads and
transient voltage suppressors (TVS) protect the output
circuits.
The digital inputs are buffered by NPN transistors that
allow current drive of the inputs. Voltages up to +25VDC
can be used to drive these inputs. The transistor buff-
ers drive a latch that the HC12 polls to collect the input
status. U4 is used by the HC12 to address the particu-
lar I/O latch it wishes to query.
The analog inputs allow a 0 to +10VDC input to be digi-
tized by the HC12's eight 8-bit A/D converters. A volt-
age divider ensures that the HC12's inputs will not be
overdriven.
3.7 Front Display
The Front Display PWA has the three front panel
switches, triple 7-segment display, Input Status LED's,
Enable, Data, and Interface LED's. The three switches
are sensed and processed directly by the HC12 on the
System Controller PWA. The two IC's, U1 & U2, control
all of the front panel LED's by switching the LED's at a
20%, 1-kHz rate. The serial control from the HC12 tells
the IC's which LED's to light.