28 compactpci rear i/o connector j5 pinout 2 - 32, 29 compactpci rear i/o connector j5 signals 2 - 33, 3 dip switch sw3 for boot configuration 4 - 4 – Kontron CP6003-RC User Manual

Page 10: 4 configuration resistors’ settings 4 - 5, 7 i/o address map 4 - 7, 8 status register 0 (stat0) 4 - 8, 9 status register 1 (stat1) 4 - 9, 10 control register 0 (ctrl0) 4 - 10, 11 control register 1 (ctrl1) 4 - 11, 12 device protection register (dprot) 4 - 12

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Preface

CP6003-RA/RC

Page x

ID 1046-3890, Rev. 1.0

P R E L I M I N A R Y

2-28 CompactPCI Rear I/O Connector J5 Pinout ............................................. 2 - 32

2-29 CompactPCI Rear I/O Connector J5 Signals ........................................... 2 - 33

4-1

DIP Switch SW1 for CompactPCI Interface Configuration ......................... 4 - 3

4-2

DIP Switch SW2 for PMC Interface Configuration ..................................... 4 - 3

4-3

DIP Switch SW3 for Boot Configuration ..................................................... 4 - 4

4-4

Configuration Resistors’ Settings ............................................................... 4 - 5

4-5

JP2 Jumper Setting for RS-422 TXD Termination (COMB) ....................... 4 - 6

4-6

JP3 Jumper Setting for RS-422 RXD Termination (COMB) ....................... 4 - 6

4-7

I/O Address Map ........................................................................................ 4 - 7

4-8

Status Register 0 (STAT0) .......................................................................... 4 - 8

4-9

Status Register 1 (STAT1) .......................................................................... 4 - 9

4-10 Control Register 0 (CTRL0) ..................................................................... 4 - 10

4-11 Control Register 1 (CTRL1) ..................................................................... 4 - 11

4-12 Device Protection Register (DPROT) ....................................................... 4 - 12

4-13 Reset Status Register (RSTAT) ................................................................ 4 - 13

4-14 Board Interrupt Configuration Register (BICFG) ...................................... 4 - 14

4-15 Status Register 2 (STAT2) ........................................................................ 4 - 15

4-16 Board ID High Byte Register (BIDH) ........................................................ 4 - 15

4-17 Board and PLD Revision Register (BREV) .............................................. 4 - 16

4-18 Geographic Addressing Register (GEOAD) ............................................. 4 - 16

4-19 Watchdog Timer Control Register (WTIM) ............................................... 4 - 18

4-20 Board ID Low Byte Register (BIDL) ......................................................... 4 - 19

4-21 LED Configuration Register (LCFG) ........................................................ 4 - 20

4-22 LED Control Register (LCTRL) ................................................................ 4 - 21

4-23 General Purpose Output Register (GPOUT) ............................................ 4 - 22

4-24 General Purpose Input Register (GPIN) .................................................. 4 - 22

5-1

Maximum Input Power Voltage Limits ........................................................ 5 - 3

5-2

DC Operational Input Voltage Ranges ....................................................... 5 - 3

5-3

Input Voltage Characteristics ..................................................................... 5 - 4

5-4

uEFI Shell Mode ......................................................................................... 5 - 7

5-5

Win. XP with Processor and Graphics in Idle State ................................... 5 - 7

5-6

Win. XP with Red. Processor Frequency and Basic Graphics Operation .. 5 - 7

5-7

Win. XP with Max. Processor Workload and Basic Graphics Operation .... 5 - 7

5-8

Win. XP with Max. Processor and Graphics Workload .............................. 5 - 7

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