Come-bhl6 / pinout list – Kontron COMe-bHL6 User Manual
Page 68
COMe-bHL6 / Pinout List
A63
GPI1
General Purpose Input 1
I-3.3
PU 10k 3.3V (S0)
-
A64
PCIE_TX1+
PCI Express Lane 1 Transmit +
DP-O
-
-
A65
PCIE_TX1-
PCI Express Lane 1 Transmit -
DP-O
-
-
A66
GND
Power Ground
PWR GND
-
-
A67
GPI2
General Purpose Input 2
I-3.3
PU 10k 3.3V (S0)
-
A68
PCIE_TX0+
PCI Express Lane 0 Transmit +
DP-O
-
-
A69
PCIE_TX0-
PCI Express Lane 0 Transmit -
DP-O
-
-
A70
GND
Power Ground
PWR GND
-
-
A71
LVDS_A0+
LVDS Channel A Data0 +
DP-O
-
-
A72
LVDS_A0-
LVDS Channel A Data0 -
DP-O
-
-
A73
LVDS_A1+
LVDS Channel A Data1 +
DP-O
-
configuration as eDP_TX1+ in customised article version
possible
A74
LVDS_A1-
LVDS Channel A Data1 -
DP-O
-
configuration as eDP_TX1- in customised article version
possible
A75
LVDS_A2+
LVDS Channel A Data2 +
DP-O
-
configuration as eDP_TX0+ in customised article version
possible
A76
LVDS_A2-
LVDS Channel A Data2 -
DP-O
-
configuration as eDP_TX0- in customised article version
possible
A77
LVDS_VDD_EN
LVDS Panel Power Control
O-3.3
PD 100k
configuration as eDP_VDD_EN in customised article
version possible
A78
LVDS_A3+
LVDS Channel A Data3 +
DP-O
-
-
A79
LVDS_A3-
LVDS Channel A Data3 -
DP-O
-
-
A80
GND
Power Ground
PWR GND
-
-
A81
LVDS_A_CK+
LVDS Channel A Clock +
DP-O
-
-
A82
LVDS_A_CK-
LVDS Channel A Clock -
DP-O
-
-
A83
LVDS_I2C_CK
LVDS Data Channel Clock
I/O-3.3
PU 2k21 3.3V (S0)
configuration as eDP_AUX+ in customised article version
possible
A84
LVDS_I2C_DAT
LVDS Data Channel Data
I/O-3.3
PU 2k21 3.3V (S0)
configuration as eDP_AUX- in customised article version
possible
A85
GPI3
General Purpose Input 3
I-3.3
PU 10k 3.3V (S0)
-
A86
RSVD
Reserved for future use
nc
-
-
A87
RSVD
Reserved for future use
nc
-
configuration as eDP_HPD in customised article version
possible
A88
PCIE_CLK_REF+
Reference PCI Express Clock +
DP-O
-
-
A89
PCIE_CLK_REF-
Reference PCI Express Clock -
DP-O
-
-
A90
GND
Power Ground
PWR GND
-
-
A91
SPI_POWER
3.3V Power Output Pin for external SPI flash O-3.3
-
might be powered during suspend
A92
SPI_MISO
SPI Master IN Slave OUT
I-3.3
PU 20k in PCH (SPI) resistor value can range from 15kOhm to 40kOhm and
might be powered during suspend
A93
GPO0
General Purpose Output 0
O-3.3
PD 10k
-
A94
SPI_CLK
SPI Clock
O-3.3
-
-
A95
SPI_MOSI
SPI Master Out Slave In
O-3.3
PD 20k in PCH
resistor value can range from 15kOhm to 40kOhm
A96
TPM_PP
TPM Physical Presence
I-3.3
PD 100k
-
A97
TYPE10#
No Connect for type 6 modules
nc
-
-
A98
SER0_TX
Serial Port 0 TXD
O-3.3
-
20V protection circuit implemented on module, PD on
carrier board needed for proper operation
A99
SER0_RX
Serial Port 0 RXD
I-5T
PU 47k 3.3V (S0)
20V protection circuit implemented on module
A100 GND
Power Ground
PWR GND
-
-
A101 SER1_TX
Serial Port 1 TXD
O-3.3
-
20V protection circuit implemented on module, PD on
carrier board needed for proper operation
A102 SER1_RX
Serial Port 1 RXD
I-5T
PU 47k 3.3V (S0)
20V protection circuit implemented on module
A103 LID#
LID Switch Input
I-3.3
PU 47k 3.3V (S5)
20V protection circuit implemented on module
A104 VCC_12V
Main Input Voltage (8.5-20V)
PWR 8.5-20V -
-
A105 VCC_12V
Main Input Voltage (8.5-20V)
PWR 8.5-20V -
-
A106 VCC_12V
Main Input Voltage (8.5-20V)
PWR 8.5-20V -
-
A107 VCC_12V
Main Input Voltage (8.5-20V)
PWR 8.5-20V -
-
A108 VCC_12V
Main Input Voltage (8.5-20V)
PWR 8.5-20V -
-
A109 VCC_12V
Main Input Voltage (8.5-20V)
PWR 8.5-20V -
-
A110 GND
Power Ground
PWR GND
-
-
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