Kontron ETX miniBaseboard - Manual (Page 12)

5 Connector pin out
Kontron User's Guide ETX miniBaseboard 12
5.3 Flat panel Connector
LCD Connector (JILI)
BIASON Controls panel contrast voltage.
DIGON Controls panel digital power.
BLON# Controls backlight power.
LTGIO0 General purpose I/O pin; not used by JILI interface.
JILI_DAT, JILI_CLK I2C interface for panel parameter EEPROM. This EEPROM is mounted on the LVDS receiver. The
data in the EEPROM allows the ETX module to automatically set the proper timing parameters
for a specific LCD panel.
DETECT# Panel hot-plug detection. Implementation of this pin is optional. See the specific ETX module
product manual for details.
LCDDO0..19 LCD data output pins LVDS support.
Pin Name LVDS signal Channel
LCDDO0 Txout0- first
LCDDO1 Txout0+ first
LCDDO2 Txout1- first
LCDDO3 Txout1+ first
LCDDO4 Txout2- first
LCDDO5 Txout2+ first
LCDDO6 Txclk- first
LCDDO7 Txclk+ first
LCDDO8 Txout3- first
LCDDO9 Txout3+ first
LCDDO10 Txout0- second
LCDDO11 Txout0+ second
LCDDO12 Txout1- second
LCDDO13 Txout1+ second
LCDDO14 Txout2- second
LCDDO15 Txout2+ second
LCDDO16 Txclk- second
LCDDO17 Txclk+ second
LCDDO18 Txout3- second
LCD Connector (JIDI)
R[0..5], G[0..5], B[0..5] Parallel digital signals for red, green and blue pixel data.
HSYNC Horizontal Sync: This output supplies the horizontal synchronization pulse for flat panels.
This signal is named LP (Line Pulse) in some flat panel literature.
VSYNC Vertical Sync: This output supplies the vertical synchronization pulse for flat panels. This
signal is named FLM (First Line Marker) in some flat panel literature.
DE Data enable signal. Usage depends on display type.
SHCLK Panel data clock signal.