Kontron PB-TIM2 User Manual

Page 11

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PB-TIM2 User’s Manual

Chapter 2 Functional Description

2

2. F

UNCTIONAL

D

ESCRIPTION

In timer mode, the PB-TIM2 requires that input (A) be used as a trigger, input (B) as a gate and input (C) as a clear. The
block diagram of the piggyback is provided in figure 2.0.1.

Figure 2.0.1 Block diagram of the PB-TIM2 piggyback

OPTO

OPTO

OPTO

OPTO

OPTO

OPTO

OPTO

RC +

Schmitt

RC +

Schmitt

RC +

Schmitt

RC +

Schmitt

Configuration

PROM

EEPROM

A, B, C Inputs

Output

Channel

2

Channel

1

Channel

3

ID

SW

Board

ID

IRQ

Vector

Serial

Decoder

Control

Logic

and

Status

Decoding

and

Timing

Logic

ISYSCLK
ISYSRES
IIR/W
IDS0
IDS1
CS
INTA
IA1..IA7
UDTACK
INT
ID0..ID15

Common
Clear

Control

Address

Data

VMOD-ST

VMOD-ST

FPGA

A, B, C Inputs

A, B, C Inputs

Output

Output

July 30, 1997

© 1996 PEP Modular Computers

Page 2-1

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