Contents
About This IP Core..............................................................................................1-1
Altera DSP IP Core Features...................................................................................................................... 1-1
FFT IP Core Features...................................................................................................................................1-1
General Description.....................................................................................................................................1-2
Fixed Transform Size FFT.............................................................................................................. 1-2
Variable Streaming FFT..................................................................................................................1-2
DSP IP Core Device Family Support.........................................................................................................1-2
DSP IP Core Verification............................................................................................................................1-3
FFT IP Core Release Information..............................................................................................................1-3
Performance and Resource Utilization.....................................................................................................1-4
FFT IP Core Getting Started............................................................................... 2-1
Installing and Licensing IP Cores..............................................................................................................2-1
OpenCore Plus IP Evaluation........................................................................................................ 2-1
FFT II IP Core OpenCore Plus Timeout Behavior..................................................................... 2-2
IP Catalog and Parameter Editor...............................................................................................................2-2
Specifying IP Core Parameters and Options............................................................................................2-3
Files Generated for Altera IP Cores...............................................................................................2-4
Simulating Altera IP Cores in other EDA Tools..................................................................................... 2-7
DSP Builder Design Flow............................................................................................................................2-8
FFT IP Core Functional Description.................................................................. 3-1
Fixed Transform FFTs.................................................................................................................................3-1
Variable Streaming FFTs............................................................................................................................ 3-1
Fixed-Point Variable Streaming FFTs...........................................................................................3-2
Floating-Point Variable Streaming FFTs......................................................................................3-2
Input and Output Orders................................................................................................................3-2
FFT Processor Engines................................................................................................................................3-3
Quad-Output FFT Engine.............................................................................................................. 3-3
Single-Output FFT Engine..............................................................................................................3-4
I/O Data Flow...............................................................................................................................................3-5
Streaming FFT..................................................................................................................................3-5
Variable Streaming.......................................................................................................................... 3-7
Buffered Burst.................................................................................................................................3-11
Burst.................................................................................................................................................3-13
FFT IP Core Parameters........................................................................................................................... 3-14
FFT IP Core Interfaces and Signals.........................................................................................................3-16
Avalon-ST Interfaces in DSP IP Cores....................................................................................... 3-16
FFT IP Core Avalon-ST Signals...................................................................................................3-17
FFT IP Core Signals in Qsys Systems..........................................................................................3-19
TOC-2
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