Avago Technologies LSI53C1030 - Manual (Page 120)

4-34 PCI Host Register Description
Version 2.2 Copyright © 2001, 2002, 2003 by LSI Logic Corporation. All rights reserved.
Diagnostic Read/Write Data [31:0]
Using this register, the LSI53C1030 reads/writes data at
the address that the
Diagnostic Read/Write Address reg-
ister specifies.
Register: 0x14
Diagnostic Read/Write Address
Read/Write
The Diagnostic Read/Write Address register specifies a Dword location
on the internal bus. The address increments by a Dword whenever the
host system accesses the
Diagnostic Read/Write Address register. This
register is only accessible through PCI I/O Space and returns
0xFFFFFFFF if read through PCI Memory Space. The host can enable
write access to this register by writing the correct Write I/O Key to the
Write Sequence register and setting bit 4, the Diagnostic Write Enable
bit, of the Host Diagnostic register. A write of any value other than the
correct Write I/O Key to the Write Sequence register disables write
access to this register. There is one Diagnostic Read/Write Address
register that is visible to both PCI functions. The two PCI functions
physically share this register.
Diagnostic Read/Write Address [31:0]
This register holds the address that the Diagnostic
Read/Write Data register writes data to or reads data
from.
31 0
Diagnostic Read/Write Address
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0