Avago Technologies LSI53C825AE - Manual (Page 217)

Transfer Control Instructions 5-33
Interrupt-on-the-Fly Instruction
The LSI53C825A can do a true/false comparison of the
ALU carry bit or compare the phase and/or data as
defined by the Phase Compare, Data Compare, and
True/False bit fields.
If the comparisons are true, and the Interrupt-on-the-Fly
bit (
Interrupt Status (ISTAT) , bit 2) is set, the LSI53C825A
asserts the Interrupt-on-the-Fly bit.
SCSIP[2:0] SCSI Phase [26:24]
This 3-bit field corresponds to the three SCSI bus phase
signals that are compared with the phase lines latched
when SREQ/ is asserted. Comparisons can be performed
to determine the SCSI phase actually being driven on the
SCSI bus. The following table describes the possible
combinations and their corresponding SCSI phase.
These bits are only valid when the LSI53C825A is
operating in Initiator mode. Clear these bits when the
LSI53C825A is operating in Target mode.
RA Relative Addressing Mode 23
When this bit is set, the 24-bit signed value in the DMA
SCRIPTS Pointer Save (DSPS) register is used as a
relative offset from the current DMA SCRIPTS Pointer
(DSP) address (which is pointing to the next instruction,
not the one currently executing). The relative mode does
not apply to Return and Interrupt SCRIPTS.
MSG C/D I/O SCSI Phase
0 0 0 Data-Out
0 0 1 Data-In
0 1 0 Command
0 1 1 Status
1 0 0 Reserved-Out
1 0 1 Reserved-In
1 1 0 Message-Out
1 1 1 Message-In