Fan r,i, Fan r,q – Epson 6200A User Manual
Page 46
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
Source Format:
Operation:
OP-Code:
Type:
Clock Cycles:
Flag:
Description:
Example:
MSB
LSB
MSB
LSB
C –
Z –
D –
I –
C –
Z –
D –
I –
40
EPSON
S1C6200/6200A CORE CPU MANUAL
3 INSTRUCTION SET
FAN r,i
Logical AND immediate data i with r-register for flag check
FAN r,i
r
∧
i
3
to i
0
1
1
0
1
1
0
r
1
r
0
i
3
i
2
i
1
i
0
D80H to DBFH
II
7
Not affected
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Performs a logical AND operation between immediate data i and the contents of
the r-register. Only the Z flag is affected. The r-register remains unchanged.
FAN A,7
FAN MY,9
FAN B,2
A register
1000
1000
1000
1000
B register
0100
0100
0100
0100
Memory (MY)
1000
1000
1000
1000
C flag
1
1
1
1
Z flag
0
1
0
1
FAN r,q
Logical AND q-register with r-register for flag check
FAN r,q
r
∧
q
1
1
1
1
0
0
0
1 r
1
r
0
q
1
q
0
F10H to F1FH
IV
7
Not affected
Set if the result is zero; otherwise, reset.
Not affected
Not affected
Performs a logical AND operation between the contents of the q-register and the
contents of the r-register. Only the Z flag is affected. The registers remains
unchanged.
FAN A,B
FAN MX,B
FAN A,MY
A register
1000
1000
1000
1000
B register
1010
1010
1010
1010
Memory (MX)
0101
0101
0101
0101
Memory (MY)
1110
1110
1110
1110
C flag
0
0
0
0
Z flag
0
0
1
0