2 memory and operations, 1 program memory (rom), Emory – Epson 6200A User Manual

Page 9: Perations

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S1C6200/6200A CORE CPU MANUAL

EPSON

2 MEMORY AND OPERATIONS

2 M

EMORY

AND

PERATIONS

A single-chip microcomputer using the S1C6200/6200A Core CPU has four major blocks: the

program memory (ROM), the data memory (RAM and I/O), the arithmetic logic unit (ALU) and the timing
generator circuit. This section describes each of these blocks in detail.

2.1 Program Memory (ROM)

Program memory contains the instructions that the CPU executes. Figure 2.1.1 shows the configuration of
the program memory.

Each instruction is a 12-bit word. Program memory can also be used for data tables for the table look-up
instructions.

There are two banks of program memory. Each bank is subdivided into 16 pages of 256 words (or steps).
That is:

Program memory = 2 banks

= 8,192 steps

1 bank

= 4,096 steps
= 16 pages

1 page

= 256 steps

1 step

= 1 word
= 12 bits

Certain addresses in ROM have specific functions, as shown in Table 2.1.1.

Table 2.1.1 Allocated program memory

Bank 0, Page 1, Step 0

Bank 0, Page 1, Step 1 to 15

Bank 0, Page 0, Step 0 to 255

Bank 1, Page 1, Step 1 to 15

Bank 1, Page 0, Step 0 to 255

Address

Function

Reset vector

Interrupt vectors used while a program is running in bank 0

Bank 0, page 0 area

Direct call subroutines for use by CALZ while a program is running in bank 0

Interrupt vectors used while a program is running in bank 1

Bank 1, page 0 area

Direct call subroutines for use by CALZ while a program is running in bank 1

Page 15

;;;;;;;

Bank 0

Page 14

;;;;;;;

Bank 0

Step 0
Step 1

Step 254
Step 255

Page 3

;;;;;;;

Bank 0

Page 2

;;;;;;;

Bank 0

Step 0

Page 1

Reset vector

Interrupt

vectors

for Bank 0

;;;;;;

Bank 0

Step 0
Step 1

Step 15

Step 254
Step 255

Page 0

;;;;;;;

Bank 0

Step 0
Step 1

Step 254
Step 255

Page 15

;;;;;;

Bank 1

Page 14

;;;;;;

Bank 1

Step 0
Step 1

Step 254
Step 255

Page 3

;;;;;;;

Bank 1

Page 2

;;;;;;

Bank 1

Step 0

;;;;;;;

Bank 1

Step 0
Step 1

Step 15

Step 254
Step 255

Page 0

;;;;;;;

Bank 1

Step 0
Step 1

Step 254
Step 255

PCB

(between banks)

PCP

(within bank)

PCS

(within bank)

12-bit

instructions

Program or data
code area

;;;;

Program or data
code or CALZ
subloutines in
Bank 0

;;;;

Program or data
code or CALZ
subloutines in
Bank 1

;;;

Page 1

Interrupt

vectors

for Bank 1

Bank 0

Bank 1

Fig. 2.1.1 Program memory configuration

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