Hitachi 1000 - Manual (Page 13)

www.hitachi.com BladeSymphony 1000 Architecture White Paper 13
Baseboard Management Controller
The Baseboard Management Controller (BMC) is the main controller for Intelligent Platform
Management Interface (IPMI), a common interface to hardware and firmware used to monitor system
health and manage the system. The BMC manages the interface between system management
software and the hardware in the server blade. It is connected to the service processor (SVP) inside the
Switch & Management Module. The BMC and SVP cooperate with each other to control and monitor
the entire system. Sensors built into the system report to the BMC on different parameters such as
temperature, cooling fan speeds, power, mode, OS status, etc. The BMC can send alerts to the system
administrator if the parameters vary from specified preset limits, indicating a potential failure of a
component or the system.
Memory System
Intel Itanium Server Blades are equipped with 16 DIMM slots, which support Registered DDR2-400
SDRAM in 512 MB, 1 GB, 2 GB, and 4 GB (DDR2-533) for a total of up to 64 GB per server blade, or
16 GB per core. The memory system is designed to control a set of four DIMMs for the ECC and the
memory-device replacing function. Accordingly, if DIMMs are added, they must be arranged in four
DIMM units. The different DIMMs in each row can be used logically as shown in Figure 5.
Figure 5. Memory configuration
The memory system of the Intel Itanium Server Blade includes several RAS features:
• ECC protection (S2EC-D2ED) — Detects an error in any two sets of consecutive two bits and
corrects errors in any one set of consecutive two bits.
Connection between nodes 400 MHz FSB = 4.8 GB/sec.
667 MHz FSB = 5.3 GB/sec.
Table 3: Bus throughput from the Hitachi Node Controller
Bus Throughput
Priority
of DIMM-set
mounting
4
3
2
1
Row 45
Row 67
Row 01
Row 23
Logical
Name of
DIMM sets
72 bit
DIMM1A0 DIMM1A0 DIMM1B0 DIMM1B0
DIMM1C0 DIMM1C0 DIMM1D0 DIMM1D0
DIMM1A1 DIMM1A1 DIMM1B1 DIMM1B1
DIMM1C1 DIMM1C1 DIMM1D1 DIMM1D1
MC1 MC1
DIMM0A0 DIMM0A0 DIMM0B0 DIMM0B0
DIMM0C0 DIMM0C0
DIMM0A1 DIMM0A1 DIMM0B1 DIMM0B1
DIMM0C1 DIMM0C1
MC0 MC0
NDC NDC
72 bit 72 bit 72 bit 72 bit 72 bit 72 bit 72 bit
72 bit 72 bit
DIMM0D0 DIMM0D0
DIMM0D1 DIMM0D1