Document Outline

• 1.0 Interface requirements 1
  • 1.1 How to use this interface manual 1
    • 1.1.1 Scope of SCSI standards 2
    • 1.1.2 Applicable standards 3
  • 1.2 General interface description 3
    • 1.2.1 Glossary 4
    • 1.2.2 Keywords 11
  • 1.3 Physical interface characteristics 12
  • 1.4 Summary of SCSI messages 12
• 2.0 SCSI bus 13
  • 2.1 SCSI bus signals overview 15
    • 2.1.1 Drive select 17
    • 2.1.2 Signal values 17
  • 2.2 Signal states 17
    • 2.2.1 SE signals 17
    • 2.2.2 LVD signals 17
  • 2.3 OR-tied signals 18
  • 2.4 Signal sources 19
  • 2.5 SCSI bus timing 20
    • 2.5.1 Arbitration delay 26
    • 2.5.2 ATN transmit setup time 26
    • 2.5.3 ATN receive setup time 26
    • 2.5.4 Bus clear delay 27
    • 2.5.5 Bus free delay 27
    • 2.5.6 Bus set delay 27
    • 2.5.7 Bus settle delay 27
    • 2.5.8 Cable skew delay 27
    • 2.5.9 Chip noise in receiver 27
    • 2.5.10 Clock jitter 27
    • 2.5.11 Crosstalk time shift 27
    • 2.5.12 De-skewed data valid window 28
    • 2.5.13 Flow control receive hold time 28
    • 2.5.14 Flow control receive setup time 28
    • 2.5.15 Flow control transmit hold time 28
    • 2.5.16 Flow control transmit setup time 28
    • 2.5.17 pCRC receive hold time 28
    • 2.5.18 pCRC receive setup time 28
    • 2.5.19 pCRC transmit hold time 28
    • 2.5.20 pCRC transmit setup time 28
    • 2.5.21 Data release delay 29
    • 2.5.22 DIFFSENS voltage filter time 29
    • 2.5.23 Offset induced time asymmetry 29
    • 2.5.24 Physical disconnection delay 29
    • 2.5.25 Power on to selection 29
    • 2.5.26 QAS arbitration delay 29
    • 2.5.27 QAS assertion delay 29
    • 2.5.28 QAS release delay 29
    • 2.5.29 QAS non-data phase REQ(ACK) period 29
    • 2.5.30 Receive assertion period 29
    • 2.5.31 Receive hold time 29
    • 2.5.32 Receive internal hold time 30
    • 2.5.33 Receive internal setup time 30
    • 2.5.34 Receive negation period 30
    • 2.5.35 Receive setup time 30
    • 2.5.36 Receive REQ(ACK) period tolerance 30
    • 2.5.37 Receive REQ assertion period with P_CRCA transitioning 30
    • 2.5.38 Receive REQ negation period with P_CRCA transitioning 30
    • 2.5.39 Receive skew compensation 30
    • 2.5.40 Receiver amplitude time skew 31
    • 2.5.41 REQ(ACK) period 31
    • 2.5.42 Reset delay 31
    • 2.5.43 Reset hold time 31
    • 2.5.44 Reset to selection 31
    • 2.5.45 Residual skew error 31
    • 2.5.46 Selection abort time 31
    • 2.5.47 Selection timeout delay 31
    • 2.5.48 Signal timing skew 31
    • 2.5.49 Skew correction range 32
    • 2.5.50 Strobe offset tolerance 32
    • 2.5.51 System deskew delay 32
    • 2.5.52 System noise at launch 32
    • 2.5.53 System noise at receiver 32
    • 2.5.54 Time asymmetry 32
    • 2.5.55 Transmit assertion period 32
    • 2.5.56 Transmit hold time 32
    • 2.5.57 Transmit ISI compensation 32
    • 2.5.58 Transmit negation period 32
    • 2.5.59 Transmit setup time 33
    • 2.5.60 Transmit REQ(ACK) period tolerance 33
    • 2.5.61 Transmit REQ assertion period with P_CRCA transitioning 33
    • 2.5.62 Transmit REQ negation period with P_CRCA transitioning 33
    • 2.5.63 Transmitter skew 33
    • 2.5.64 Transmitter time asymmetry 33
  • 2.6 Measurement points 33
    • 2.6.1 SE Fast-5 and Fast-10 measurement points 33
    • 2.6.2 SE Fast-20 measurement points 33
    • 2.6.3 LVD measurement points 34
  • 2.7 Clocking methods for data transfers 34
  • 2.8 Paced transfer on a SCSI bus 36
  • 2.9 Data transfer modes 37
    • 2.9.1 Asynchronous transfers 37
    • 2.9.2 Synchronous transfers 37
    • 2.9.3 Paced transfers 37
  • 2.10 ST DATA phase parallel transfers 38
  • 2.11 DT DATA phase parallel transfers 38
    • 2.11.1 Data group transfers 38
    • 2.11.2 Information unit transfers 38
  • 2.12 Negotiation 39
    • 2.12.1 Negotiation algorithm 39
    • 2.12.2 When to negotiate 40
    • 2.12.3 Negotiable fields 40
    • 2.12.4 Transfer agreements 42
    • 2.12.5 Transfer period factor 43
    • 2.12.6 REQ/ACK offset 44
    • 2.12.7 Transfer width exponent 44
    • 2.12.8 Protocol options 45
      • 2.12.8.1 IU_REQ 45
      • 2.12.8.2 DT_REQ 46
      • 2.12.8.3 QAS_REQ 46
      • 2.12.8.4 HOLD_MCS 46
      • 2.12.8.5 WR_FLOW 47
      • 2.12.8.6 RD_STRM 47
      • 2.12.8.7 RTI (Retain Training Information) 47
      • 2.12.8.8 PCOMP_EN 47
    • 2.12.9 Negotiable field combinations 48
    • 2.12.10 Message restrictions 49
    • 2.12.11 Negotiation message sequences 49
• 3.0 Logical characteristics 51
  • 3.1 SCSI bus phases overview 51
    • 3.1.1 BUS FREE phase 51
      • 3.1.1.1 Unexpected and expected bus free phases 51
      • 3.1.1.2 Expected bus free phases 52
    • 3.1.2 Arbitration and QAS overview 52
      • 3.1.2.1 Normal ARBITRATION phase 53
      • 3.1.2.2 QAS protocol 54
      • 3.1.2.3 QAS phase overview 54
  • 3.2 SELECTION phase 55
    • 3.2.1 Selection overview 56
      • 3.2.1.1 Selection using attention condition 56
        • 3.2.1.1.1 Starting the SELECTION phase when using attention condition 56
        • 3.2.1.1.2 Information unit transfers disabled 56
        • 3.2.1.1.3 Information unit transfers enabled 56
        • 3.2.1.1.4 Selection using attention condition timeout procedure 57
      • 3.2.1.2 Selection without using attention condition 57
        • 3.2.1.2.1 Information unit transfers disabled or enabled 57
        • 3.2.1.2.2 Selection without using attention condition time-out procedure 57
  • 3.3 RESELECTION phase 58
    • 3.3.1 RESELECTION phase overview 58
    • 3.3.2 Physical reconnection 58
    • 3.3.3 Physical reconnection timeout procedure 59
  • 3.4 SCSI bus fairness 59
  • 3.5 Information transfer phases 60
    • 3.5.1 Asynchronous transfer 61
    • 3.5.2 Synchronous transfer 61
      • 3.5.2.1 ST synchronous data transfer 61
      • 3.5.2.2 DT synchronous transfer 62
        • 3.5.2.2.1 Information unit transfer 62
        • 3.5.2.2.2 Data group data field transfer 64
    • 3.5.3 Paced transfer 68
      • 3.5.3.1 Paced transfer training pattern 68
        • 3.5.3.1.1 DT DATA IN phase training pattern 69
        • 3.5.3.1.2 DT DATA OUT phase training pattern 70
      • 3.5.3.2 P1 data valid/invalid state transitions 71
        • 3.5.3.2.1 Starting pacing transfers at end of training pattern 72
        • 3.5.3.2.2 Starting pacing transfers with no training pattern 72
        • 3.5.3.2.3 Ending pacing transfers 73
      • 3.5.3.3 Paced information unit transfer 73
      • 3.5.3.4 Deskewing 74
    • 3.5.4 Wide transfer 74
  • 3.6 COMMAND phase 75
    • 3.6.1 COMMAND phase description 75
    • 3.6.2 COMMAND phase exception condition handling 75
  • 3.7 DATA phase 75
    • 3.7.1 DATA phase overview 75
    • 3.7.2 DT DATA IN phase 75
    • 3.7.3 DT DATA OUT phase 76
    • 3.7.4 ST DATA IN phase 76
    • 3.7.5 ST DATA OUT phase 76
  • 3.8 STATUS phase 76
    • 3.8.1 STATUS phase description 76
    • 3.8.2 STATUS phase exception condition handling 76
  • 3.9 MESSAGE phase 76
    • 3.9.1 MESSAGE phase overview 76
    • 3.9.2 MESSAGE IN phase 76
      • 3.9.2.1 MESSAGE IN phase exception condition handling 77
    • 3.9.3 MESSAGE OUT phase 77
      • 3.9.3.1 MESSAGE OUT phase exception condition handling 77
  • 3.10 Signal restrictions between phases 77
  • 3.11 SCSI bus phase sequences 78
    • 3.11.1 SCSI bus phase sequences overview 78
    • 3.11.2 Phase sequences for physical reconnection and selection using attention condition with information unit transfers disabled 78
    • 3.11.3 Phase sequences for selection without using attention condition with information unit transfers disabled 79
    • 3.11.4 Phase sequences for physical reconnection or selection without using attention condition with information unit transfers enabled 80
    • 3.11.5 Phase sequences for physical selection using attention condition with information unit transfers enabled 81
  • 3.12 Data bus protection 81
    • 3.12.1 Data bus protection overview 81
    • 3.12.2 ST data bus protection using parity 81
    • 3.12.3 DT data bus protection using CRC 82
      • 3.12.3.1 DT data bus protection using CRC overview 82
      • 3.12.3.2 Error detection capabilities 82
      • 3.12.3.3 Order of bytes in the CRC field 82
• 4.0 Message system specification 83
  • 4.1 General message protocols and formats 83
  • 4.2 Message formats 83
    • 4.2.1 One-byte messages 84
    • 4.2.2 Two-byte messages 84
    • 4.2.3 Extended messages 84
  • 4.3 Message categories 85
    • 4.3.1 LINK CONTROL MESSAGES 85
    • 4.3.2 DISCONNECT 87
    • 4.3.3 IDENTIFY 87
    • 4.3.4 IGNORE WIDE RESIDUE 88
    • 4.3.5 INITIATOR DETECTED ERROR 89
    • 4.3.6 LINKED COMMAND COMPLETE 89
    • 4.3.7 MESSAGE PARITY ERROR 89
    • 4.3.8 MESSAGE REJECT 89
    • 4.3.9 MODIFY DATA POINTER 89
    • 4.3.10 MODIFY BIDIRECTIONAL DATA POINTER 90
    • 4.3.11 NO OPERATION 91
    • 4.3.12 PARALLEL PROTOCOL REQUEST 92
      • 4.3.12.1 PARALLEL PROTOCOL REQUEST 95
    • 4.3.13 QAS REQUEST 96
    • 4.3.14 RESTORE POINTERS 96
    • 4.3.15 SAVE DATA POINTERS 96
    • 4.3.16 SYNCHRONOUS DATA TRANSFER REQUEST 97
      • 4.3.16.1 Target initiated SDTR negotiation 99
      • 4.3.16.2 Initiator initiated SDTR negotiation 99
    • 4.3.17 TASK COMPLETE 99
    • 4.3.18 WIDE DATA TRANSFER REQUEST 100
      • 4.3.18.1 Target initiated WDTR negotiation 101
      • 4.3.18.2 Initiator initiated Wide Data Transfer Request (WDTR) negotiation 102
  • 4.4 Task attribute messages 102
    • 4.4.1 Task attribute message overview and codes 102
    • 4.4.2 ACA (AUTO CONTINGENT ALLEGIANCE) 103
    • 4.4.3 HEAD OF QUEUE 104
    • 4.4.4 ORDERED 104
    • 4.4.5 SIMPLE 104
  • 4.5 Task management messages 105
    • 4.5.1 Task management message codes 105
    • 4.5.2 ABORT TASK 105
    • 4.5.3 ABORT TASK SET 106
    • 4.5.4 CLEAR ACA 106
    • 4.5.5 CLEAR TASK SET 106
    • 4.5.6 LOGICAL UNIT RESET 106
    • 4.5.7 TARGET RESET 106
• 5.0 Miscellaneous SCSI bus characteristics 107
  • 5.1 Attention condition 107
  • 5.2 Bus reset condition 108
  • 5.3 Hard reset 108
  • 5.4 Reset events 109
    • 5.4.1 Bus reset event 109
    • 5.4.2 Power on reset event 109
    • 5.4.3 Target reset event 109
    • 5.4.4 Transceiver mode change reset event 109
  • 5.5 Asynchronous condition recovery 109
    • 5.5.1 SCSI pointers 109
    • 5.5.2 Active pointers 110
    • 5.5.3 Saved pointers 110
  • 5.6 Command processing considerations and exception conditions 111
    • 5.6.1 Command processing considerations and exception conditions overview 111
    • 5.6.2 Asynchronous event notification 111
    • 5.6.3 Incorrect initiator connection 111
    • 5.6.4 Unexpected RESELECTION phase 112
• 6.0 SPI information units 113
  • 6.1 Information unit transfer logical operations 113
  • 6.2 SPI information units 118
    • 6.2.1 SPI command information unit 118
    • 6.2.2 SPI L_Q information unit 121
    • 6.2.3 SPI data information unit 125
    • 6.2.4 SPI data stream information unit 125
    • 6.2.5 SPI status information unit 127
• 7.0 SCSI commands 131
  • 7.1 Command implementation requirements 131
    • 7.1.1 Reserved 131
  • 7.2 Command Descriptor Block (CDB) 131
    • 7.2.1 Fixed and variable length Command Descriptor Block formats 133
  • 7.3 Status 138
    • 7.3.1 Status precedence 139
  • 7.4 Command examples 140
    • 7.4.1 Single command example 140
    • 7.4.2 Disconnect example 141
  • 7.5 Timing examples 142
  • 7.6 Command processing considerations and exception conditions 142
    • 7.6.1 Auto Contingent Allegiance or Contingent Allegiance 142
      • 7.6.1.1 Logical Unit response to Auto Contingent Allegiance or Contingent Allegiance 142
      • 7.6.1.2 Clearing an Auto Contingent Allegiance condition 143
    • 7.6.2 Overlapped commands 143
    • 7.6.3 Incorrect logical unit selection 144
    • 7.6.4 Sense data 144
      • 7.6.4.1 Asynchronous Event Reporting 144
      • 7.6.4.2 Autosense 145
    • 7.6.5 Unexpected RESELECTION phase 145
    • 7.6.6 Unit Attention condition 146
    • 7.6.7 Target hard reset 147
    • 7.6.8 Logical unit reset 147
  • 7.7 Queued tasks (formerly “queued I/O processes”) 147
    • 7.7.1 Untagged task queuing 147
    • 7.7.2 Tagged task queuing 148
  • 7.8 Parameter rounding 149
  • 7.9 Programmable operating definition 149
  • 7.10 Incorrect initiator connection 150
• 8.0 Drive features 151
  • 8.1 S.M.A.R.T. system 151
  • 8.2 Self-test operations 151
    • 8.2.1 Default self-test 151
    • 8.2.2 The short and extended self-tests 151
    • 8.2.3 Self-test modes 152
      • 8.2.3.1 Foreground mode 152
      • 8.2.3.2 Background mode 152
      • 8.2.3.3 Elements common to foreground and background self-test modes 153
  • 8.3 Alternate error detection for the asynchronous information phases (AIP)-Command, Message, and Status 154
    • 8.3.1 Error detection for asynchronous information phases 154
    • 8.3.2 Protection code 154
      • 8.3.2.1 Covered signals 155
      • 8.3.2.2 Code description 157
      • 8.3.2.3 Error detection properties 157
    • 8.3.3 Protection code usage 157
      • 8.3.3.1 Protection code transmission 158
      • 8.3.3.2 Enabling protection code checking 158
      • 8.3.3.3 Disabling protection code checking 158
    • 8.3.4 Parity 158
    • 8.3.5 Error handling 158
  • 8.4 Removal and insertion of SCSI devices (popularly known as “hot plugging”) 158
    • 8.4.1 Removal and insertion of SCSI devices overview 158
    • 8.4.2 Case 1-Power off during removal or insertion 159
    • 8.4.3 Case 2-RST signal asserted continuously during removal or insertion 159
    • 8.4.4 Case 3-Current I/O processes not allowed during insertion or removal 159
    • 8.4.5 Case 4-Current I/O process allowed during insertion or removal 159
  • 8.5 SPI-3 to SCSI-2 terminology mapping 160
• Figure 1. SCSI client-server model 4
• Figure 2. Voltage and current definitions 18
• Figure 3. LVD Signaling sense 18
• Figure 4. ST latching data vs. DT latching data 35
• Figure 5. ST synchronous transfer example 35
• Figure 6. DT synchronous transfer example 36
• Figure 7. Paced transfer example 36
• Figure 8. Example of a SCSI bus with paced transfers 37
• Figure 9. Use of P1 to establish data valid and data invalid states 72
• Figure 10. Phase sequences for physical reconnection and selection using attention condition with information unit transfers disabled 79
• Figure 11. Phase sequences for selection without using attention condition with information unit transfers disabled 79
• Figure 12. Phase sequences for physical reconnection or selection without using attention condition/ with information unit transfers enabled 80
• Figure 13. Phase sequences for selection with attention condition/physical reconnection and information unit transfers enabled 81
• Figure 14. SPI information unit sequence during initial connection 115
• Figure 15. SPI information unit sequence during data type transfers 116
• Figure 16. SPI information unit sequence during data stream type transfers 117
• Figure 17. SPI information unit sequence during status transfers 118
• Figure 18. Single command example 140
• Figure 19. Disconnect example 141
• Figure 20. Protection code generator 157
• 1.0 Interface requirements
  • 1.1 How to use this interface manual
    • 1.1.1 Scope of SCSI standards
    • 1.1.2 Applicable standards
  • 1.2 General interface description
    • 1.2.1 Glossary
    • 1.2.2 Keywords
  • 1.3 Physical interface characteristics
  • 1.4 Summary of SCSI messages
• 2.0 SCSI bus
  • 2.1 SCSI bus signals overview
    • 2.1.1 Drive select
    • 2.1.2 Signal values
  • 2.2 Signal states
    • 2.2.1 SE signals
    • 2.2.2 LVD signals
  • 2.3 OR-tied signals
  • 2.4 Signal sources
  • 2.5 SCSI bus timing
    • 2.5.1 Arbitration delay
    • 2.5.2 ATN transmit setup time
    • 2.5.3 ATN receive setup time
    • 2.5.4 Bus clear delay
    • 2.5.5 Bus free delay
    • 2.5.6 Bus set delay
    • 2.5.7 Bus settle delay
    • 2.5.8 Cable skew delay
    • 2.5.9 Chip noise in receiver
    • 2.5.10 Clock jitter
    • 2.5.11 Crosstalk time shift
    • 2.5.12 De-skewed data valid window
    • 2.5.13 Flow control receive hold time
    • 2.5.14 Flow control receive setup time
    • 2.5.15 Flow control transmit hold time
    • 2.5.16 Flow control transmit setup time
    • 2.5.17 pCRC receive hold time
    • 2.5.18 pCRC receive setup time
    • 2.5.19 pCRC transmit hold time
    • 2.5.20 pCRC transmit setup time
    • 2.5.21 Data release delay
    • 2.5.22 DIFFSENS voltage filter time
    • 2.5.23 Offset induced time asymmetry
    • 2.5.24 Physical disconnection delay
    • 2.5.25 Power on to selection
    • 2.5.26 QAS arbitration delay
    • 2.5.27 QAS assertion delay
    • 2.5.28 QAS release delay
    • 2.5.29 QAS non-data phase REQ(ACK) period
    • 2.5.30 Receive assertion period
    • 2.5.31 Receive hold time
    • 2.5.32 Receive internal hold time
    • 2.5.33 Receive internal setup time
    • 2.5.34 Receive negation period
    • 2.5.35 Receive setup time
    • 2.5.36 Receive REQ(ACK) period tolerance
    • 2.5.37 Receive REQ assertion period with P_CRCA transitioning
    • 2.5.38 Receive REQ negation period with P_CRCA transitioning
    • 2.5.39 Receive skew compensation
    • 2.5.40 Receiver amplitude time skew
    • 2.5.41 REQ(ACK) period
    • 2.5.42 Reset delay
    • 2.5.43 Reset hold time
    • 2.5.44 Reset to selection
    • 2.5.45 Residual skew error
    • 2.5.46 Selection abort time
    • 2.5.47 Selection timeout delay
    • 2.5.48 Signal timing skew
    • 2.5.49 Skew correction range
    • 2.5.50 Strobe offset tolerance
    • 2.5.51 System deskew delay
    • 2.5.52 System noise at launch
    • 2.5.53 System noise at receiver
    • 2.5.54 Time asymmetry
    • 2.5.55 Transmit assertion period
    • 2.5.56 Transmit hold time
    • 2.5.57 Transmit ISI compensation
    • 2.5.58 Transmit negation period
    • 2.5.59 Transmit setup time
    • 2.5.60 Transmit REQ(ACK) period tolerance
    • 2.5.61 Transmit REQ assertion period with P_CRCA transitioning
    • 2.5.62 Transmit REQ negation period with P_CRCA transitioning
    • 2.5.63 Transmitter skew
    • 2.5.64 Transmitter time asymmetry
  • 2.6 Measurement points
    • 2.6.1 SE Fast-5 and Fast-10 measurement points
    • 2.6.2 SE Fast-20 measurement points
    • 2.6.3 LVD measurement points
  • 2.7 Clocking methods for data transfers
  • 2.8 Paced transfer on a SCSI bus
  • 2.9 Data transfer modes
    • 2.9.1 Asynchronous transfers
    • 2.9.2 Synchronous transfers
    • 2.9.3 Paced transfers
  • 2.10 ST DATA phase parallel transfers
  • 2.11 DT DATA phase parallel transfers
    • 2.11.1 Data group transfers
    • 2.11.2 Information unit transfers
  • 2.12 Negotiation
    • 2.12.1 Negotiation algorithm
    • 2.12.2 When to negotiate
    • 2.12.3 Negotiable fields
    • 2.12.4 Transfer agreements
    • 2.12.5 Transfer period factor
    • 2.12.6 REQ/ACK offset
    • 2.12.7 Transfer width exponent
    • 2.12.8 Protocol options
      • 2.12.8.1 IU_REQ
      • 2.12.8.2 DT_REQ
      • 2.12.8.3 QAS_REQ
      • 2.12.8.4 HOLD_MCS
      • 2.12.8.5 WR_FLOW
      • 2.12.8.6 RD_STRM
      • 2.12.8.7 RTI (Retain Training Information)
      • 2.12.8.8 PCOMP_EN
    • 2.12.9 Negotiable field combinations
    • 2.12.10 Message restrictions
    • 2.12.11 Negotiation message sequences
• 3.0 Logical characteristics
  • 3.1 SCSI bus phases overview
    • 3.1.1 BUS FREE phase
      • 3.1.1.1 Unexpected and expected bus free phases
      • 3.1.1.2 Expected bus free phases
    • 3.1.2 Arbitration and QAS overview
      • 3.1.2.1 Normal ARBITRATION phase
      • 3.1.2.2 QAS protocol
      • 3.1.2.3 QAS phase overview
  • 3.2 SELECTION phase
    • 3.2.1 Selection overview
      • 3.2.1.1 Selection using attention condition
        • 3.2.1.1.1 Starting the SELECTION phase when using attention condition
        • 3.2.1.1.2 Information unit transfers disabled
        • 3.2.1.1.3 Information unit transfers enabled
        • 3.2.1.1.4 Selection using attention condition timeout procedure
      • 3.2.1.2 Selection without using attention condition
        • 3.2.1.2.1 Information unit transfers disabled or enabled
        • 3.2.1.2.2 Selection without using attention condition time-out procedure
  • 3.3 RESELECTION phase
    • 3.3.1 RESELECTION phase overview
    • 3.3.2 Physical reconnection
    • 3.3.3 Physical reconnection timeout procedure
  • 3.4 SCSI bus fairness
  • 3.5 Information transfer phases
    • 3.5.1 Asynchronous transfer
    • 3.5.2 Synchronous transfer
      • 3.5.2.1 ST synchronous data transfer
      • 3.5.2.2 DT synchronous transfer
        • 3.5.2.2.1 Information unit transfer
          • 3.5.2.2.1.1 DT DATA IN phase information unit transfer exception condition handling
          • 3.5.2.2.1.2 DT DATA OUT phase information unit transfer exception condition handling
        • 3.5.2.2.2 Data group data field transfer
          • 3.5.2.2.2.1 Data group pad field and pCRC field transfer to SCSI initiator port
          • 3.5.2.2.2.2 Data group pad field and pCRC field transfer to SCSI target port
    • 3.5.3 Paced transfer
      • 3.5.3.1 Paced transfer training pattern
        • 3.5.3.1.1 DT DATA IN phase training pattern
        • 3.5.3.1.2 DT DATA OUT phase training pattern
      • 3.5.3.2 P1 data valid/invalid state transitions
        • 3.5.3.2.1 Starting pacing transfers at end of training pattern
        • 3.5.3.2.2 Starting pacing transfers with no training pattern
        • 3.5.3.2.3 Ending pacing transfers
      • 3.5.3.3 Paced information unit transfer
      • 3.5.3.4 Deskewing
    • 3.5.4 Wide transfer
  • 3.6 COMMAND phase
    • 3.6.1 COMMAND phase description
    • 3.6.2 COMMAND phase exception condition handling
  • 3.7 DATA phase
    • 3.7.1 DATA phase overview
    • 3.7.2 DT DATA IN phase
    • 3.7.3 DT DATA OUT phase
    • 3.7.4 ST DATA IN phase
    • 3.7.5 ST DATA OUT phase
  • 3.8 STATUS phase
    • 3.8.1 STATUS phase description
    • 3.8.2 STATUS phase exception condition handling
  • 3.9 MESSAGE phase
    • 3.9.1 MESSAGE phase overview
    • 3.9.2 MESSAGE IN phase
      • 3.9.2.1 MESSAGE IN phase exception condition handling
    • 3.9.3 MESSAGE OUT phase
      • 3.9.3.1 MESSAGE OUT phase exception condition handling
  • 3.10 Signal restrictions between phases
  • 3.11 SCSI bus phase sequences
    • 3.11.1 SCSI bus phase sequences overview
    • 3.11.2 Phase sequences for physical reconnection and selection using attention condition with information unit transfers disabled
    • 3.11.3 Phase sequences for selection without using attention condition with information unit transfers disabled
    • 3.11.4 Phase sequences for physical reconnection or selection without using attention condition with information unit transfers enabled
    • 3.11.5 Phase sequences for physical selection using attention condition with information unit transfers enabled
  • 3.12 Data bus protection
    • 3.12.1 Data bus protection overview
    • 3.12.2 ST data bus protection using parity
    • 3.12.3 DT data bus protection using CRC
      • 3.12.3.1 DT data bus protection using CRC overview
      • 3.12.3.2 Error detection capabilities
      • 3.12.3.3 Order of bytes in the CRC field
• 4.0 Message system specification
  • 4.1 General message protocols and formats
  • 4.2 Message formats
    • 4.2.1 One-byte messages
    • 4.2.2 Two-byte messages
    • 4.2.3 Extended messages
  • 4.3 Message categories
    • 4.3.1 LINK CONTROL MESSAGES
    • 4.3.2 DISCONNECT
    • 4.3.3 IDENTIFY
    • 4.3.4 IGNORE WIDE RESIDUE
    • 4.3.5 INITIATOR DETECTED ERROR
    • 4.3.6 LINKED COMMAND COMPLETE
    • 4.3.7 MESSAGE PARITY ERROR
    • 4.3.8 MESSAGE REJECT
    • 4.3.9 MODIFY DATA POINTER
    • 4.3.10 MODIFY BIDIRECTIONAL DATA POINTER
    • 4.3.11 NO OPERATION
    • 4.3.12 PARALLEL PROTOCOL REQUEST
      • 4.3.12.1 PARALLEL PROTOCOL REQUEST
    • 4.3.13 QAS REQUEST
    • 4.3.14 RESTORE POINTERS
    • 4.3.15 SAVE DATA POINTERS
    • 4.3.16 SYNCHRONOUS DATA TRANSFER REQUEST
      • 4.3.16.1 Target initiated SDTR negotiation
      • 4.3.16.2 Initiator initiated SDTR negotiation
    • 4.3.17 TASK COMPLETE
    • 4.3.18 WIDE DATA TRANSFER REQUEST
      • 4.3.18.1 Target initiated WDTR negotiation
      • 4.3.18.2 Initiator initiated Wide Data Transfer Request (WDTR) negotiation
  • 4.4 Task attribute messages
    • 4.4.1 Task attribute message overview and codes
    • 4.4.2 ACA (AUTO CONTINGENT ALLEGIANCE)
    • 4.4.3 HEAD OF QUEUE
    • 4.4.4 ORDERED
    • 4.4.5 SIMPLE
  • 4.5 Task management messages
    • 4.5.1 Task management message codes
    • 4.5.2 ABORT TASK
    • 4.5.3 ABORT TASK SET
    • 4.5.4 CLEAR ACA
    • 4.5.5 CLEAR TASK SET
    • 4.5.6 LOGICAL UNIT RESET
    • 4.5.7 TARGET RESET
• 5.0 Miscellaneous SCSI bus characteristics
  • 5.1 Attention condition
  • 5.2 Bus reset condition
  • 5.3 Hard reset
  • 5.4 Reset events
    • 5.4.1 Bus reset event
    • 5.4.2 Power on reset event
    • 5.4.3 Target reset event
    • 5.4.4 Transceiver mode change reset event
  • 5.5 Asynchronous condition recovery
    • 5.5.1 SCSI pointers
    • 5.5.2 Active pointers
    • 5.5.3 Saved pointers
  • 5.6 Command processing considerations and exception conditions
    • 5.6.1 Command processing considerations and exception conditions overview
    • 5.6.2 Asynchronous event notification
    • 5.6.3 Incorrect initiator connection
    • 5.6.4 Unexpected RESELECTION phase
• 6.0 SPI information units
  • 6.1 Information unit transfer logical operations
  • 6.2 SPI information units
    • 6.2.1 SPI command information unit
    • 6.2.2 SPI L_Q information unit
    • 6.2.3 SPI data information unit
    • 6.2.4 SPI data stream information unit
    • 6.2.5 SPI status information unit
• 7.0 SCSI commands
  • 7.1 Command implementation requirements
    • 7.1.1 Reserved
  • 7.2 Command Descriptor Block (CDB)
    • 7.2.1 Fixed and variable length Command Descriptor Block formats
  • 7.3 Status
    • 7.3.1 Status precedence
  • 7.4 Command examples
    • 7.4.1 Single command example
    • 7.4.2 Disconnect example
  • 7.5 Timing examples
  • 7.6 Command processing considerations and exception conditions
    • 7.6.1 Auto Contingent Allegiance or Contingent Allegiance
      • 7.6.1.1 Logical Unit response to Auto Contingent Allegiance or Contingent Allegiance
      • 7.6.1.2 Clearing an Auto Contingent Allegiance condition
    • 7.6.2 Overlapped commands
    • 7.6.3 Incorrect logical unit selection
    • 7.6.4 Sense data
      • 7.6.4.1 Asynchronous Event Reporting
      • 7.6.4.2 Autosense
    • 7.6.5 Unexpected RESELECTION phase
    • 7.6.6 Unit Attention condition
    • 7.6.7 Target hard reset
    • 7.6.8 Logical unit reset
  • 7.7 Queued tasks (formerly “queued I/O processes”)
    • 7.7.1 Untagged task queuing
    • 7.7.2 Tagged task queuing
  • 7.8 Parameter rounding
  • 7.9 Programmable operating definition
  • 7.10 Incorrect initiator connection
• 8.0 Drive features
  • 8.1 S.M.A.R.T. system
  • 8.2 Self-test operations
    • 8.2.1 Default self-test
    • 8.2.2 The short and extended self-tests
    • 8.2.3 Self-test modes
      • 8.2.3.1 Foreground mode
      • 8.2.3.2 Background mode
      • 8.2.3.3 Elements common to foreground and background self-test modes
  • 8.3 Alternate error detection for the asynchronous information phases (AIP)- Command, Message, and Status
    • 8.3.1 Error detection for asynchronous information phases
    • 8.3.2 Protection code
      • 8.3.2.1 Covered signals
      • 8.3.2.2 Code description
      • 8.3.2.3 Error detection properties
    • 8.3.3 Protection code usage
      • 8.3.3.1 Protection code transmission
      • 8.3.3.2 Enabling protection code checking
      • 8.3.3.3 Disabling protection code checking
    • 8.3.4 Parity
    • 8.3.5 Error handling
  • 8.4 Removal and insertion of SCSI devices (popularly known as “hot plugging”)
    • 8.4.1 Removal and insertion of SCSI devices overview
    • 8.4.2 Case 1-Power off during removal or insertion
    • 8.4.3 Case 2-RST signal asserted continuously during removal or insertion
    • 8.4.4 Case 3-Current I/O processes not allowed during insertion or removal
    • 8.4.5 Case 4-Current I/O process allowed during insertion or removal
  • 8.5 SPI-3 to SCSI-2 terminology mapping
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