12 data bus protection, 1 data bus protection overview, 2 st data bus protection using parity – Seagate Ultra 320 User Manual

Page 95

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Parallel SCSI Interface Product Manual, Rev. A

81

3.11.5

Phase sequences for physical selection using attention condition with information unit
transfers enabled

The sequences for a selection with attention condition while an information unit transfer agreement is in effect
shall be as shown in Figure 14.

The normal progression for selection using attention condition (see Section 3.2.1.1.3) if QAS is disabled is:
1. from the BUS FREE phase to ARBITRATION;
2. from ARBITRATION to SELECTION;
3. from SELECTION to MESSAGE OUT;
4. from MESSAGE OUT to MESSAGE IN; and
5. from MESSAGE IN to BUS FREE.

Figure 14. Phase sequences for selection with attention condition/physical reconnection and information unit
transfers enabled

3.12

Data bus protection

3.12.1

Data bus protection overview

The data bus DB(P_CRCA) signal and the DB(P1) signals are used to generate parity or control the transfer of
pCRC information on the Data Bus.

3.12.2

ST data bus protection using parity

For ARBITRATION phase the DB(P_CRCA) and DB(P1) signals shall not be checked for parity errors. For
SELECTION and RESELECTION phases, valid parity is determined by the rules in Table 23.

Table 23:

Parity checking rules for SELECTION and RESELECTION phases

Note.

These rules are necessary to permit interoperation of SCSI devices with different Data Bus widths. For
example, if an 8-bit SCSI device selects a 16-bit SCSI device, the 16-bit SCSI device observes invalid
parity on the upper 8 bits of the Data Bus.

Action

Condition

Check for odd parity on:

If at least one bit is active on:

DB(7-0,P_CRCA)

DB(15-0,P_CRCA,P1)

DB(15-8,P1)

DB(15-8,P1)

MESSAGE OUT

MESSAGE IN

ARBITRATION

BUS FREE

Hard reset
or protocol
error

SELECTION

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