Seagate Ultra 320 - Manual (Page 43)

Parallel SCSI Interface Product Manual, Rev. A ) 29
2.5.21 Data release delay
The maximum time for a SCSI initiator port to release the DATA BUS, DB(P_CRCA), and/or DB(P1) signals,
following the transition of the I/O signal from false to true.
2.5.22 DIFFSENS voltage filter time
The minimum time DIFFSENS voltage shall be sensed continuously within the voltage range of a valid SCSI
bus mode.
2.5.23 Offset induced time asymmetry
Time symmetry error created by the cumulative sum of all offset errors seen by the receiver. This includes non-
symmetrical transmitter drive plus terminator current mismatch, receiver offset, and voltage drop due to resis-
tance in the interconnect within the cable or backplane.
2.5.24 Physical disconnection delay
The minimum time that a SCSI target port shall wait after releasing BSY before participating in an ARBITRA-
TION phase when honoring a DISCONNECT MESSAGE from the initiator.
2.5.25 Power on to selection
The recommended maximum time from power application until a SCSI target is able to respond with appropri-
ate status and sense data to the TEST UNIT READY, INQUIRY, and REQUEST SENSE commands (see ANSI
SCSI Primary Commands-4 standard).
2.5.26 QAS arbitration delay
The minimum time a SCSI device with QAS enabled shall wait from the detection of the MSG, C/D, and I/O sig-
nals being false to start QAS until the data bus is examined to see if QAS has been won (see Section 4.3.12).
2.5.27 QAS assertion delay
The maximum time allowed for a SCSI device to assert certain signals during QAS.
2.5.28 QAS release delay
The maximum time allowed for a SCSI device to release certain signals during QAS.
2.5.29 QAS non-data phase REQ(ACK) period
The minimum time a QAS-capable initiator shall ensure the REQ and ACK signals are asserted and that the
data is valid during the COMMAND, MESSAGE, and STATUS phases.
2.5.30 Receive assertion period
The minimum time required at a SCSI device receiving a REQ signal for the signal to be asserted while using
synchronous transfers or paced transfers, provided P_CRCA is not transitioning during data group transfers.
Also, the minimum time required at a SCSI device receiving an ACK signal for the signal to be asserted while
using synchronous transfers or paced transfers. For SE Fast-5 and Fast-10 operation, the time period is mea-
sured at the 0,8 V level. For SE Fast-20 operation, the period is measured at the 1,0 V level. For LVD, see SPI-
5 Section 9, for signal measurement points.
2.5.31 Receive hold time
For ST data transfers, the minimum time required at the receiving SCSI device between the assertion of the
REQ signal or the ACK signals and the changing of the Data Bus, DB(P_CRCA), and/or DB(P1) signals while
using synchronous data transfers, provided P_CRCA is not transitioning during data group transfers. For DT
data transfers, the minimum time required at the receiving SCSI device between the transition (i.e., assertion
or negation) of the REQ signal or the ACK signals and the changing of the data bus, DB(P_CRCA), and/or