FUJITSU FR family 32-bit microcontroller instruction manuel CM71-00101-5E - Manual (Page 90)

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CHAPTER 6 INSTRUCTION OVERVIEW
6.2 Instruction Notation Formats
FR family CPU instructions are written in the following three notation formats.
• Calculations are designated by a mnemonic placed between operand 1 and operand
2, with the results stored at operand 2.
• Operations are designated by a mnemonic, and use operand 1.
• Operations are designated by a mnemonic.
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Instruction Notation Formats
FR family CPU instructions are written in the following 3 notation formats.
●
Calculations are designated by a mnemonic placed between operand 1 and operand 2, with the results
stored at operand 2.
<Mnemonic> <Operand 1> <Operand 2>
[Example] ADD R1, R2 ; R1 + R2 --> R2
●
Operations are designated by a mnemonic, and use operand 1.
<Mnemonic> <Operand 1>
[Example] JMP @R1 ; R1 --> PC
●
Operations are designated by a mnemonic.
<Mnemonic>
[Example] NOP ; No operation