FUJITSU FMB AN706 - Manual (Page 52)

AN706-00040-2v0-E
51
7.2.3 System Specifications
7.2.3.1 Microcontroller System Specifications
Microcontroller system specifications are given in Table 16.
Table 16 Microcontroller System Specifications
Item Description Remarks
Operation
Clock
CPU:80MHz
APB1 to 3:40MHz
High-speed PLL oscillation
Internal 20 multiplier
ROM(FLASH)
(*1)
113.0Kbyte MP3
Vector section: 248 bytes
Program section: 112.7 Kbytes
152.6 Kbytes AAC
Vector section: 248 bytes
Program section: 152.4 Kbytes
RAM (*1) 64.0 Kbytes MP3 Variable: 32.0 Kbytes
Stack: 8.0 Kbytes
Heap: 24.0 Kbytes
63.8 Kbytes AAC Variable: 24.3 Kbytes
Stack: 8.0 Kbytes
Heap: 31.5 Kbytes
MFS (*2) Uses 2 ch For I
2
S communication
With CSIO (*3) as the slave mode, realizes I
2
S by
serial output based on clock input from OSC.
For details, see
“7.2.3.3 MFS System
Specifications ”.
DMAC Uses 4 ch ch. 0/1: For USB host control
ch. 2/3: For CSIO data transfer
For details, see “7.2.3.4 DMAC System
Specifications ”.
USB － For USB host control
External bus 16bit For LCD control
Timer Base Timer ch2 For timer count, 1 ms cycle
(*1) For details, see
“7.2.3.2 Memory Map”.
(*2) Multi Function Serial (MFS) Interface
(*3) Clock sync Serial I/O (CSIO) interface