5 timing characteristic – Intel PCI-7200 User Manual

Page 37

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Operation Theorem

• 27

4.5 Timing Characteristic

1. I_REQ as input data strobe (Rising Edge Active)

t

h

≥ 60ns t

I

≥ 60ns

t

CYC

≥ 5 PCI CLK Cycle

t

s

≥ 2ns

t

n

≥ 30ns

2. I_REQ as input data strobe (Falling Edge Active)

t

s

valid data

D10~DI31

t

n

valid data

IN_R I_REQ

t

cyc

t

l

t

h

t

h

≥ 60ns t

I

≥ 60ns

t

CYC

≥ 5 PCI CLK Cycle

t

s

≥ 2ns

t

n

≥ 30ns

IN_ I_REQ

t

l

t

cyc

t

h

t

s

valid data

D10~DI31

t

n

valid data

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