Intel SR6850HW4 - Manual (Page 71)

Intel® Server Platform SR6850HW4 TPS Power Supply
Revision 1.0
Intel order number D23151-001
59
5.4.7 Current Sharing
Outputs of two supplies that are connected in parallel must meet the regulation requirements of
a single supply. Under normal operation with two supplies running in parallel, the outputs must
share the load current. If one of the supplies fails, the remaining supply must pick up the entire
load without any of the outputs dropping out of regulation. A defective supply that is connected
to the output voltage bus has no adverse effect on the operation of the remaining functional
supply.
Table 35. Output Current Sharing
Output Level Output Sharing
+3.3V
stby
Not required
+12V Active
5.4.8 I
2
C Devices
All I 2 C devices are powered from the cathode side of the +3.3V
stby
OR’ing diode. This allows the
status and FRU data to be read from a power supply that is not powered on or has some other
fault. Protection is provided so if a power supply fault occurs it does not take down the +3.3V
stby
bus.
Address locations will be determined by external settings through P1, pin A5. The 0xA1 and
0xA2 address will be wired high on the power supply. (NE1617A does not have an 0xA2
address). The alert signal from (only) the I/O port will be through P1, pin D5.
5.4.8.1 FRU Data
The power supply contains a serial EEPROM. The address is either 0xAC or 0xAE, depending
on address bit 0xA0.