Intel Evaluation Platform Board Manual IQ80960RM - Manual (Page 36)

4-6 IQ80960RM/RN Evaluation Board Manual
i960® RM/RN I/O Processor Overview
4.6 DMA Channels
The i960 RM/RN I/O processor features three independent DMA channels, two of which operate
on the primary PCI interface, whereas the remaining one operates on the secondary PCI interface.
All three of the DMA channels connect to the i960 RM/RN I/O processor’s local bus and can be
used to transfer data from PCI devices to memory on the IQ80960RM/RN platform. Support for
chaining, and scatter/gather is built into all three channels. The DMA can address the entire 2
64
bytes of address space on the PCI bus and 2 32 bytes of address space on the internal bus.
4.7 Application Accelerator Unit
The Application Accelerator provides low-latency, high-throughput data transfer capability
between the AA unit and 80960 local memory. It executes data transfers to and from 80960 local
memory and also provides the necessary programming interface. The Application Accelerator
performs the following functions:
• Transfers data (read) from memory controller
• Performs an optional boolean operation (XOR) on read data
• Transfers data (write) to memory controller
The AA unit features:
• 128-byte, arranged as 8-byte x 16-deep store queue
• Utilization of the 80960RN/RM processor memory controller interface
• 2
32
addressing range on the 80960 local memory interface
• Hardware support for unaligned data transfers for the internal bus
• Full programmability from the i960 core processor
• Support for automatic data chaining for gathering and scattering of data blocks
Figure 4-4. i960
®
RM/RN I/O Processor DMA Controller
Primary PCI Bus
Secondary PCI Bus
PCI to PCI Bridge
80960
DMA Channel 0
DMA Channel 1
DMA Channel 2
Local Bus