NXP Semiconductors CBT3126 - Manual (Page 6)

CBT3126_4 © NXP B.V. 2009. All rights reserved.
Product data sheet Rev. 04 — 12 October 2009 6 of 13
NXP Semiconductors
CBT3126
Quad FET bus switch
12. Test information
Test data is given in Table 9 .
Definitions for test circuit:
R
L
= Load resistance.
C
L
= Load capacitance including jig and probe capacitance.
R
T
= Termination resistance should be equal to the output impedance Z
o
of the pulse generator.
V
EXT
= External voltage for measuring switching times.
Fig 8. Test circuit for measuring switching times
V M V M
t W
t
W
10 %
90 %
0 V
V I
V I
negative
pulse
positive
pulse
0 V
V M V M
90 %
10 %
t
f
t r
t
r
t f
001aae331
V EXT
V CC
V
I
V
O
DUT
CL RT
RL
RL
G
Table 9. Test data
Supply voltage Input Load V
EXT
V
CC
V
I
t
r
, t
f
C
L
R
L
t
PLH
, t
PHL
t
PLZ
, t
PZL
t
PHZ
, t
PZH
4.5 V to 5.5 V GND to 3.0 V
≤
2.5 ns 50 pF 500
Ω
open 7.0 V open