Onboard clock, Table 3, Phase-locked loop (pll) reference clock – National Instruments NI 5412 User Manual

Page 10: Table 4, Internal vcxo)

Advertising
background image

NI 5412 Specifications

10

ni.com

Onboard Clock

(Internal VCXO)

Phase-Locked Loop (PLL) Reference Clock

Table 3.

Specification

Value

Comments

Clock Source

Internal sample clocks can either be locked to a Reference
Clock using a phase-locked loop or be derived from the
onboard VCXO frequency reference.

Frequency
Accuracy

±25 ppm

Table 4.

Specification

Value

Comments

Sources

1. NI PXI-5412—PXI_CLK10 (backplane connector)

NI PCI-5412—RTSI_7 (RTSI_CLK)

2. CLK IN (SMB front panel connector)

The PLL
Reference Clock
provides the
reference
frequency for the
phase-locked
loop.

Frequency
Accuracy

When using the PLL, the Frequency Accuracy of the
NI 5412 is solely dependent on the Frequency Accuracy
of the PLL Reference Clock Source.

Lock Time

≤ 200 ms.

Frequency
Range

5 MHz to 20 MHz in increments of 1 MHz.
Default of 10 MHz.

The PLL Reference Clock Frequency has to be accurate
to ±50 ppm.

Duty Cycle
Range

40% to 60%

Exported PLL
Reference
Clock
Destinations

1. PFI<0..1> (SMB front panel connectors)

2. NI PXI-5412—PXI_Trig<0..6> (backplane connector)

NI PCI-5412—RTSI<0..6>

Advertising