Chapter 4 functional overview, Dual processor architecture, Dual processor architecture -1 – National Instruments 7340 PCI User Manual

Page 21: Functional overview

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4-1

NI 7340 User Manual

4

Functional Overview

This chapter provides an overview of motion control algorithms and the
PXI/PCI-7340 controller.

Dual Processor Architecture

With the 7340, you can perform up to four axes of simultaneous,
coordinated motion control in a preemptive, multitasking, real-time
environment.

An advanced dual-processor architecture that uses a 32-bit CPU combined
with a digital signal processor (DSP) and custom FPGAs give the 7340
high-performance capabilities. The FIFO bus interface and powerful
function set provide high-speed communications while off-loading
complex motion functions from the host PC for optimized system
performance.

The 7340 uses the DSP for all closed-loop control, including position
tracking, PID control closed-loop computation, and motion trajectory
generation. The DSP chip is supported by custom FPGAs that perform the
high-speed encoder interfacing, position capture and breakpoint functions,
motion I/O processing, and stepper pulse generation for hard real-time
functionality.

The embedded, multitasking real-time CPU handles host communications,
command processing, multi-axis interpolation, onboard program
execution, error handling, general-purpose digital I/O, and overall motion
system integration functions.

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