National Instruments PCI-4452 User Manual
National Instruments Computer Accessories
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Table of contents
Document Outline
- PCI-4451/4452 User Manual
- Support
- Important Information
- Contents
- About This Manual
- Chapter 1 Introduction
- Chapter 2 Installation and Configuration
- Chapter 3 Hardware Overview
- Chapter 4 Signal Connections
- I/O Connectors
- Analog Input Signal Connections
- Types of Signal Sources
- Analog Output Signal Connections
- Analog Power Connections
- Digital I/O Signal Connections
- Digital Power Connections
- Timing Connections
- Field Wiring Considerations
- Chapter 5 Calibration
- Chapter 6 Theory of Analog Operation
- Appendix A Specifications
- Appendix B Pin Connections
- Appendix C Customer Communication
- Glossary
- Index
- Figures
- Figure 3-1. Digital Function Block Diagram
- Figure 3-2. Analog Function Block Diagram
- Figure 3-3. Below-Low-Level Triggering Mode
- Figure 3-4. Above-High-Level Triggering Mode
- Figure 3-5. Inside-Region Triggering Mode
- Figure 3-6. High-Hysteresis Triggering Mode
- Figure 3-7. Low-Hysteresis Triggering Mode
- Figure 3-8. RTSI Bus Signal Connection
- Figure 4-1. Analog Pin Connections
- Figure 4-2. Digital Pin Connections
- Figure 4-3. Analog Input Stage
- Figure 4-4. Analog Output Channel Block Diagram
- Figure 4-5. Digital I/O Connections
- Figure 4-6. Typical Posttriggered Acquisition
- Figure 4-7. Typical Pretriggered AcquisitionPFI1
- Figure 4-8. EXTSTROBE* Signal Timing
- Figure 4-9. GPCTR0_SOURCE Signal Timing
- Figure 4-10. GPCTR0_OUT Signal Timing
- Figure 4-11. GPCTR1_SOURCE Signal Timing
- Figure 4-12. GPCTR1_OUT Signal Timing
- Figure 4-13. GPCTR Timing Summary
- Figure 6-1. Input Frequency Response
- Figure 6-2. Input Frequency Response Near the Cutoff
- Figure 6-3. Alias Rejection at the Oversample Rate
- Figure 6-4. Comparison of a Clipped Signal to a Proper Signal
- Figure 6-5. Signal Spectra in the DAC
- Figure A-1. Idle Channel Noise (Typical)
- Figure B-1. 68 Pin Digital Connector for any Digital Accessory
- Tables