Nvidia TEGRA DG-04927-001_V01 - Manual (Page 31)

Tegra 200 Series Developer Board User Guide
DG-04927-001_v01 Advance Information – Subject to Change 31
NVIDIA CONFIDENTIAL
4.7 Camera
The Tegra 200 Series Developer Board supports a dual lane MIPI CSI connection. The Smartbook Development System uses
an OmniVision Camera module.
Figure 19: Tegra 200 Series Developer Board CSI Camera Connections
Table 12. CSI Pinout
Signal Pin Signal Pin
CSI_CLKAN AH26 CSI_D2AP AG23
CSI_CLKAP AG26 CSI_CLKBN AB20
CSI_D1AN AD20 CSI_CLKBP AC20
CSI_D1AP AE20 CSI_D1BN AH24
CSI_D2AN AH23 CSI_D1BP AG24
4.7.1 Unused Pins
Any unused signal lines can be left unconnected. If neither DSI nor CSI are implemented, the AVDD_DSI_CSI power rail, all
data/clock lines and the DSI_CSI_RUP, DSI_CSI_RND pins should be left unconnected.