Omega ISA- BUS MULTI-FUNCTIONAL BOARD OME-A822PG - Manual (Page 25)

The software driver provides three data transfer methods, polling, interrupt and DMA.
The polling subroutine, A-822_AD_PollingVar() or A-822_AD_PollingArray(), set the A/D
mode control register to 0x01. This control word enables software trigger and polling
transfer. The interrupt subroutine, A-822_AD_INT_START(…), sets the A/D mode control
mode register to ox06. This control word enables pacer trigger and interrupt transfer. The
DMA subroutine, A-822_AD_DMA_START(…), sets the A/D mode control register to
0x02. This control word means pacer trigger and DMA transfer.
Please refer to sec. 2.7 for detailed information.
2.4.9 A/D Software Trigger Control Register
(WRITE) Base+C : A/D Software Trigger Control Register
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
X X X X X X X X
X=don‘t care, XXXXXXXX=any 8 bits data is validate
The A/D converter can be triggered by software trigger or pacer trigger. The details
are given in sec. 2.4.8 and sec. 2.7. Writing any value to address BASE+C will generate a
trigger pulse to the A/D converter and initiate an A/D conversion. The address BASE+5
offers a ready bit to indicate an A/D conversion is completed.
The software driver uses this control word to detect the OME-A-822PGL/PGH
hardware board. The software initiates a software trigger and checks the ready bit . If the
ready bit can not cleared to zero in a fixed time, the software driver will return a error
message. If there is an I/O BASE address error, the ready bit will not be cleared to zero. The
software driver, A-822_CheckAddress(), uses this method to detect the I/O BASE address
setting
OME-A-822PGL/PGH Hardware Manual ---- 23